Freescale Semiconductor MC68HC08KH12 manual $FF8D $FFFF

Addr.

$FE00 $FE01 $FE02 $FE03 $FE04 $FE05 $FE06 $FE07 $FE08 $FE09 $FE0A $FE0B $FE0C $FE0D

$FE0E

$FF8D

$FFFF

Name		Bit 7	6	5	4	3	2	1	Bit 0
Break Status Register	R:	R	R	R	R	R	R	SBSW	R
(BSR)	W:
Reset Status Register	R:	POR	PIN	COP	ILOP	ILAD	USB	0	0
(RSR)	W:
Reserved	R:
	W:
Break Flag Control Register	R:	BCFE	R	R	R	R	R	R	R
(BFCR)	W:
Interrupt Status Register 1 (INT1)	R:	IF6	IF5	IF4	IF3	IF2	IF1	0	0
	W:	R	R	R	R	R	R	R	R
Interrupt Status Register 2 (INT2)	R:	0	0	0	IF11	IF10	IF9	IF8	IF7
	W:	R	R	R	R	R	R	R	R
Reserved	R:
	W:
Reserved	R:
	W:
Unimplemented	R:
	W:
Unimplemented	R:
	W:
Unimplemented	R:
	W:
Unimplemented	R:
	W:
Break Address Register High	R:	Bit 15	14	13	12	11	10	9	Bit 8
(BRKH)	W:
Break Address Register Low	R:	Bit 7	6	5	4	3	2	1	Bit 0
(BRKL)	W:
Break Status and Control Register	R:	BRKE	BRKA	0	0	0	0	0	0
(BRKSCR)	W:
Reserved	R:
	W:
COP Control Register	R:				Low byte of reset vector
(COPCTL)	W:			Writing clears COP counter (any value)

= Unimplemented

R

= Reserved

Figure 2-2. Control, Status, and Data Registers (Continued)

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