7.6.1.2 SWI Instruction

The SWI instruction is a non-maskable instruction that causes an interrupt regardless of the state of the interrupt mask (I bit) in the condition code register.

NOTE: A software interrupt pushes PC onto the stack. A software interrupt does not push PC – 1, as a hardware interrupt does.

7.6.2 Interrupt Status Registers

The flags in the interrupt status registers identify maskable interrupt sources. Table 7-3summarizes the interrupt sources and the interrupt status register flags that they set. The interrupt status registers can be useful for debugging.

Table 7-3. Interrupt Sources

 

 

 

 

 

Mask(1)

INT

Priority(2)

 

 

 

 

Source

Flag

Register

Vector Address

 

 

 

 

 

 

Flag

 

 

 

 

 

 

 

 

 

 

 

 

SWI Instruction

 

 

0

$FFFC–$FFFD

 

 

 

 

 

 

 

 

 

 

 

 

Pin

IRQF1

IMASK1

IF1

1

$FFFA–$FFFB

 

 

IRQ1

 

 

 

 

 

 

 

 

 

 

HUB Start of Frame Interrupt

SOFF

SOFIE

 

 

 

 

 

 

 

 

 

 

 

 

 

HUB 2nd End of Frame Point Interrupt

EOF2F

EOF2IE

IF2

2

$FFF8–$FFF9

 

 

 

 

 

 

 

 

HUB End of Packet Interrupt

EOPF

EOPIE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HUB Bus Signal Transition Detect Interrupt

TRANF

TRANIE

 

 

 

 

 

 

 

 

 

 

 

 

 

HUB Endpoint0 Transmit Interrupt

TXDF

TXDIE

IF3

3

$FFF6–$FFF7

 

 

 

 

 

 

 

 

HUB Endpoint0 Receive Interrupt

RXDF

RXDIE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Device Endpoint 0 Transmit Interrupt

TXD0F

TXD0IE

 

 

 

 

 

 

 

 

 

 

 

 

 

Device Endpoint 0 Receive Interrupt

RXD0F

RXD0IE

IF4

4

$FFF4–$FFF5

 

 

 

 

 

 

 

 

 

 

USB Endpoint1/2 Transmit Interrupt

TXD1F

TXD1IE

 

 

 

 

 

 

 

 

 

 

 

 

 

TIM Channel 0

CH0F

CH0IE

IF5

5

$FFF2–$FFF3

 

 

 

 

 

 

 

 

 

 

TIM Channel 1

CH1F

CH1IE

IF6

6

$FFF0–$FFF1

 

 

 

 

 

 

 

 

 

 

TIM Overflow

TOF

TOIE

IF7

7

$FFEE–$FFEF

 

 

 

 

 

 

 

 

 

 

Port-E Keyboard Pin Interrupt

KEYEF

IMASKE

IF8

8

$FFEC–$FFED

 

 

 

 

 

 

 

Advance Information

 

 

 

MC68HC(7)08KH12 Rev. 1.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

76

 

 

 

 

Freescale Semiconductor

Page 76
Image 76
Freescale Semiconductor MC68HC08KH12 manual SWI Instruction, Interrupt Sources

MC68HC08KH12 specifications

The Freescale Semiconductor MC68HC08KH12 is a versatile microcontroller that has gained popularity in various embedded systems applications. Part of the HC08 family, this microcontroller combines a robust architecture with comprehensive on-chip features, making it suitable for a wide range of applications ranging from industrial control to consumer electronics.

One of the main features of the MC68HC08KH12 is its 8-bit architecture, which provides an optimal balance between performance and power efficiency. It operates at clock speeds of up to 2 MHz, allowing for efficient execution of instructions while maintaining low power consumption. The microcontroller is designed to operate over a voltage range of 2.7 to 5.5 volts, making it adaptable to various system requirements.

The MC68HC08KH12 is equipped with 1 Kbyte of RAM and 12 Kbytes of ROM, which allows for substantial program and data storage. The on-chip memory helps reduce the need for external components, simplifying the design of embedded systems and enhancing reliability. With a wide range of I/O options, including 26 general-purpose I/O pins, the microcontroller provides flexibility in interfacing with sensors, actuators, and other devices.

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Overall, the Freescale Semiconductor MC68HC08KH12 stands out as a reliable microcontroller that combines performance, flexibility, and power efficiency. Its extensive features and technologies enable engineers to design robust embedded systems that meet the demands of modern applications. As a result, the MC68HC08KH12 remains a valuable choice for developers seeking a highly functional yet cost-effective microcontroller solution.