Advance Information MC68HC(7)08KH12 — Rev. 1.1
90 Freescale Semiconductor
Figure 8-1. CGM Block DiagramBCS
PHASE
DETECTOR LOOP
FILTER
FREQUENCY
DIVIDER
VOLTAGE
CONTROLLED
OSCILLATOR
AUTOMATIC
MODE
CONTROL
LOCK
DETECTOR
CLOCK
CGMXCLK
CGMOUT
CGMVDV CGMVCLK
SIMOSCEN
INTERRUPT
CONTROL
CGMINT
CGMRDV
PLL ANALOG
÷ 2
CGMRCLK
OSC2
OSC1
SELECT
CIRCUIT
VDDA CGMXFC VSSA
LOCK AUTO ACQ PLLIE PLLF
MUL[11:0]
REFERENCE
DIVIDER
RDS[3:0]
FREQUENCY
DIVIDER
PRE[1:0]
CGMPCLK
USBCLK
PN
R
CLOCK
SELECT
CIRCUIT
PHASE-LOCKED LOOP (PLL)
OSCILLATOR (OSC)
48MHz