Fujitsu F202RA, MB89202 manual Name Read Write, Port 3 pull-up setting register PUL3

CHAPTER 4 I/O PORTS

Table 4.3-3lists the functions of port 3 registers.

Table 4.3-3	Functions of Port 3 Registers
Register		Data	When being	When being written	Read/	Address	Initial value
name			read		Write
			Pin state is	Output latch of "0" is set and
		0		"L" level is output to the pin in
Port 3 data			"L" level.
				output port mode.
register					R/W	000CH	XXXXXXXXB
				Output latch of "1" is set and
(PDR3)			Pin state is
		1		"H" level is output to the pin in
			"H" level.
				output port mode.
				Output transistor operation is
Port 3 data		0	Read	disabled and the pin is set to
				serve as an input pin.
direction					W	000DH
			prohibited				00000000B
register
				Output transistor operation is
(DDR3)			(write only)
		1		enabled and the pin is set to
				serve as an output pin.

R/W : Readable and Writable

W: Write only

X: Undefined

●Port 3 pull-up setting register (PUL3)

The bits of the pull-up setting register correspond to the pins of port 3 in one-to-one correspondence. When the pull-up resistor is selected by using the pull-up setting register, the pin state will be "H" level (pull-up state) instead of Hi-Z during stop (SPL = 1). During a reset, however, the pull-up is invalid and the pin remains at Hi-Z.

Figure 4.3-2shows the pull-up resistor settings assigned to the values of the bits of the port 3 pull-up register.

Figure 4.3-2 Pull-up Setting Register (PUL3)

Address

0071H

bit7	bit6	bit5	bit4	bit3	bit2	bit1	bit0	Initial value
PUL37	PUL36	PUL35	PUL34	PUL33	PUL32	PUL31	PUL30	00000000B
R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W

0

1

0

1

R/W : Readable and Writable : Initial value

PUL33	PUL32	PUL31	PUL30
P33 pull-up OFF	P32 pull-up OFF	P31 pull-up OFF	P30 pull-up OFF
P33 pull-up ON	P32 pull-up ON	P31 pull-up ON	P30 pull-up ON
PUL37	PUL36	PUL35	PUL34
P37 pull-up OFF	P36 pull-up OFF	P35 pull-up OFF	P34 pull-up OFF
P37 pull-up ON	P36 pull-up ON	P35 pull-up ON	P34 pull-up ON

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