CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER

Table 8.4-2 Explanation of Functions of Each Bit in Timer 0 Control Register (TCR0)

 

Bit name

 

Function

 

 

 

 

 

 

8-bit mode

 

 

 

When the counter value of timer 0 matches the value (comparator data latch)

 

TIF0:

 

set in the timer 0 data register (TDR0), this bit is set to "1".

 

16-bit mode

bit7

Compare match

 

When the counter value of timer 0 matches the value set in TDR0 and the

 

detection flag bit

 

 

 

counter value of timer 1 matches the value set in TDR1, this bit is set to "1".

 

 

 

 

 

• An interrupt request is output when this bit and the interrupt request enable bit

 

 

 

(T0IEN) are "1".

 

 

 

 

 

TFCR0:

This bit is used to clear the compare match detection flag bit (TIF0). When this

bit6

Compare match

 

bit is set to "1", the compare match detection flag is cleared. The flag is not

 

detection flag clear bit

 

affected even if this bit is set to "0".

 

 

 

 

 

T0IEN:

This bit is used to allow and prohibit interrupt request output to the CPU.

bit5

Interrupt request enable

An interrupt request is output when this bit and the interrupt request enable bit

 

bit

 

(T0IEN) are "1".

 

 

 

 

 

• This bit is used to select whether to increment the counter at the rising or

bit4

CINV:

 

falling edge of a clock. When this bit is "0", the counter is incremented at the

Count clock selection bit

 

falling edge of the clock. When "1", the counter is incremented at the rising

 

 

 

 

 

edge.

 

 

 

 

 

• These bits are used to select the count clocks to be supplied to the counter.

 

 

• Select one clock from the seven internal clocks and one external clock.

bit3

TCS02, TCS01, TCS00:

When these bits are 111B, the external clock is input. In this case, timer 0 can

to

Clock source selection

 

operate as the counter function.

bit1

bits

Note:

 

 

 

When external clock input is selected (TCS02, TCS01, TCS00 = 111B), the

 

 

 

P33/EC pin must be set in the input port.

 

 

 

 

 

• This bit is used to start and stop the counter.

 

 

• When this bit is set to "1", the counter is cleared and incremented according to

bit0

TSTR0:

 

the selected count clock. When this bit is set to "0", the counter stops its

Timer start bit

 

operation.

 

 

 

 

• When the timer is started (TSTR0 = 0 1) in the 16-bit mode, the counters of

 

 

 

both timer 0 and timer 1 are cleared.

 

 

 

 

Note:

When using only timer 0 of the 8/16-bit capture timer/counter in the 8-bit mode, set a value other than

111B in the count clock selection bits (TCS12, TCS11, TCS10) of the timer 1 control register (TCR1). Using timer 0 with setting value TCS12, TCS11, TCS10 = 111B results in a malfunction.

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Fujitsu MB89202, F202RA manual 174

F202RA, MB89202 specifications

The Fujitsu MB89202 and F202RA microcontrollers are part of the 16-bit microcontroller family, renowned for their robust performance and versatility in a variety of embedded system applications. These devices are tailored for high-efficiency operation across diverse industries, including automotive, consumer electronics, and industrial automation.

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