Fujitsu MB89202 Configuration of Time-base Timer, Time-base timer counter, Counter clear circuit

CHAPTER 5 TIME-BASE TIMER

5.2Configuration of Time-base Timer

The time-base timer consists of the following four function blocks.

•Time-base counter

•Counter clear circuit

•Interval timer selector

•Time-base timer control register (TBTC)

■Block Diagram of Time-base Timer

Figure 5.2-1 Block Diagram of Time-base Timer

To A/D converter

To watchdog timer

Time-base timer counter

FCH
divided	X21	X22	X23
by two

X26 X27

X28 X29 X210 X211 X212 X213 X214 X215 X216 X217

X220 X221

Clearing counter

Clearing watchdog timer

To clock control section oscillation stabilization time selector

OF

OF

OFOF

Power-on reset

Starting stop mode (in normal mode)

IRQ7 (time-base timer interrupt)

OF: Overflow

FCH: Oscillation frequency

Counter	Interval timer
clear
	selector
circuit

TB0F TBIE TBC1 TBC0 TBR

Time-base timer control register (TBTC)

●Time-base timer counter

A 21-bit up counter that accepts the oscillation frequency divided by two as the count clock and stops operating when oscillation stops.

●Counter clear circuit

Clears the counter when the TBTC register is set (TBR = 0), stop mode is entered (STBC: STP = 1), or a power-on reset occurs.

●Interval timer selector

Selects 1 bit for the interval timer from four bits in the time-base counter. When the specified bit overflows, an interrupt occurs.

●Time-base timer control register (TBTC)

Selects a time interval, clears the counter, controls interrupts, or checks the status.

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