Fujitsu F202RA Serial mode control register SMC, Clock generator, Reception control circuit, 285

Models: F202RA MB89202

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CHAPTER 13 UART

Serial mode control register (SMC)

The SMC register controls UART operating mode. This register specifies the parity setting, stop bit length, operating mode (data length), and synchronous/asynchronous mode, and enables/disables UART serial clock output and serial data output.

Serial rate control register (SRC)

The SRC register controls the UART data transfer speed (baud rate). This register selects the input clock and specifies the transfer rate to be applied when the baud rate generator is used.

Serial status and data register (SSD)

The SSD register indicates UART transmitting/receiving status, status in an error, parity received, or data received at bit8. This register also enables/disables interrupts or specifies and confirms parity transmitted or data transmitted with bit8.

Serial input data register (SIDR)

The SIDR register stores received data. Serial input is converted, then stored into this register. However, the most significant bit of 9-bit data is stored in the SSD RD8/RP bit.

Serial output data register (SODR)

The SODR register specifies data to be transmitted. Data written into this register is converted to serial format, then output. The most significant bit of 9-bit data is set in the SSD TD8/TP bit.

Clock generator

The clock generator generates the transmit/receive clock in accordance with the dedicated baud rate generator, external clock, and 8-bit PWM timer output.

Reception control circuit

The reception control circuit consists of the received byte counter, start bit detection circuit, and received parity handling circuit.

The received byte counter takes count of received data. When a unit of data that corresponds to the specified data length is fully received, an interrupt request is generated.

The start bit detection circuit detects start bits in serial input signals. When the start bit detection circuit detects a start bit, it writes data into the SIDR with shifts in accordance with the transfer rate.

When parity is used, the received parity handling circuit stores the parity bit in the data received. It also stores the most significant bit of 9-bit data received.

Transmission control circuit

The transmission control circuit consists of the transmitted byte counter and transmitted parity handling circuit.

The transmitted byte counter takes count of data to be transmitted. When a unit of data that corresponds to the specified data length is fully transmitted, an interrupt request is generated.

When parity is used, the transmitted parity handling circuit generates a parity bit for the data to be transmitted. It sets the most significant bit for data transmitted when it is made up of 9 bits.

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Fujitsu F202RA Serial mode control register SMC, Clock generator, Reception control circuit, Transmission control circuit

F202RA, MB89202 specifications

The Fujitsu MB89202 and F202RA microcontrollers are part of the 16-bit microcontroller family, renowned for their robust performance and versatility in a variety of embedded system applications. These devices are tailored for high-efficiency operation across diverse industries, including automotive, consumer electronics, and industrial automation.

One of the main features of the MB89202 is its powerful CPU core, which operates at a clock speed of up to 20 MHz. This enables the microcontroller to perform complex calculations and consumer-grade applications seamlessly. The architecture is designed to handle multiple tasks effectively, making it suitable for real-time operations.

Memory capacity is a vital characteristic of the MB89202, featuring on-chip RAM and ROM configurations. The microcontroller can accommodate different memory variants, providing developers with flexibility in memory allocation based on their application requirements. This adaptability facilitates applications ranging from simple control systems to complex data processing tasks.

The F202RA variant extends the capabilities of the MB89202 by integrating advanced peripheral functions. It includes built-in timers, A/D converters, and serial communication interfaces, which are essential for interfacing with other hardware components or sensors. The availability of these peripherals reduces the need for additional external circuits, thus contributing to a more compact and cost-effective design.

In terms of power management, the MB89202 series employs advanced power-saving technologies. The microcontroller offers various low-power modes, enabling devices to conserve energy during idle times, making it highly suitable for battery-operated applications. This characteristic not only enhances the efficiency of devices but also extends their operational lifespan.

Moreover, the Fujitsu MB89202 series incorporates robust protection features, including watchdog timers and failure detection mechanisms. These safety features ensure reliable operation in critical systems, making them a preferred choice in applications where failure is not an option.

The MB89202 and F202RA microcontrollers also support a range of development tools and environments, including integrated development environments (IDEs) and software libraries, which facilitate rapid application development. With these tools, developers can efficiently prototype, debug, and optimize their applications.

In summary, the Fujitsu MB89202 and F202RA microcontrollers stand out with their efficient performance, extensive memory options, integrated peripherals, and power-saving capabilities, making them ideal for a wide array of embedded applications. Their reliability and robustness further enhance their attractiveness for designers seeking advanced microcontroller solutions.