CHAPTER 4 I/O PORTS

Table 4.2-3lists the functions of the port 0 registers.

Table 4.2-3 Functions of Port 0 Registers

Register

Data

When being

When being written

Read/

Address

Initial value

name

read

Write

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin state is

Output latch of "0" is set and

 

 

 

 

0

"L" level is output to the pin

 

 

 

 

"L" level.

 

 

 

Port 0 data

 

in output port mode.

 

 

 

 

 

R/W

0000H

XXXXXXXXB

 

 

 

register (PDR0)

 

Pin state is

Output latch of "1" is set and

 

 

 

 

 

 

1

"H" level is output to the pin

 

 

 

 

"H" level.

 

 

 

 

 

in output port mode.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output transistor operation

 

 

 

Port 0 data

0

Read

is disabled and the pin is set

 

 

 

 

to serve as an input pin.

W

0001H

 

direction

 

prohibited

 

00000000B

 

Output transistor operation

register (DDR0)

 

(write only)

 

 

 

 

1

 

is enabled and the pin is set

 

 

 

 

 

 

to serve as output pin.

 

 

 

 

 

 

 

 

 

 

R/W : Readable/Writable

W: Write only

X: Undefined

Port 0 pull-up setting register (PUL0)

The bits of the pull-up setting register correspond to the pins of port 0 in one-to-one correspondence. When the pull-up resistor is selected by using the pull-up setting register, the pin will be at "H" level (pull-up state) instead of Hi-Z during stop (SPL = 1). During a reset, however, the pull-up is invalid and the pin remains at Hi-Z.

Figure 4.2-2shows the pull-up resistor settings assigned to the values of the bits of the port 0 pull-up register.

Figure 4.2-2 Pull-up Resistor Settings (PUL0)

Address

bit7

bit6

bit5

bit4

bit3

bit2

bit1

bit0

Initial value

0070H

PUL07 PUL06 PUL05 PUL04 PUL03 PUL02

PUL01 PUL00

00000000B

 

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

 

0

1

0

1

R/W : Readable/Writable

: Initial value

PUL03

PUL02

PUL01

PUL00

P03 pull-up OFF

P02 pull-up OFF

P01 pull-up OFF

P00 pull-up OFF

P03 pull-up ON

P02 pull-up ON

P01 pull-up ON

P00 pull-up ON

PUL07

PUL06

PUL05

PUL04

P07 pull-up OFF

P06 pull-up OFF

P05 pull-up OFF

P04 pull-up OFF

P07 pull-up ON

P06 pull-up ON

P05 pull-up ON

P04 pull-up ON

81

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Fujitsu F202RA, MB89202 manual Port 0 pull-up setting register PUL0, Pull-up Resistor Settings PUL0

F202RA, MB89202 specifications

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