Fujitsu F202RA, MB89202 manual Contents

CONTENTS

CHAPTER 1		OVERVIEW	1
1.1	Features of MB89202/F202RA Series		2
1.2	MB89202/F202RA Series Product Lineup		4
1.3	Differences between Models		6
1.4	Block Diagram of MB89202/F202RA Series		7
1.5	Pin Assignment		8
1.6	Package Dimensions		10
1.7	Pin Functions Description		12
1.8	I/O Circuit Types		14
CHAPTER 2		HANDLING DEVICES	17
2.1	Precautions on Handling Devices		18
CHAPTER 3		CPU	21
3.1	Memory Space		22
3.1.1	Specific-purpose Areas		24
3.1.2	Location of 16-bit Data on Memory		26
3.2	Dedicated Register		27
3.2.1	Condition Code Register (CCR)		29
3.2.2	Register Bank Pointer (RP)		31
3.3	General-Purpose Registers		32
3.4	Interrupts		34
3.4.1	Interrupt Level Setting Registers (ILR1 to ILR4)		36
3.4.2	Steps in the Interrupt Operation		37
3.4.3	Multiple Interrupts		39
3.4.4	Interrupt Processing Time		40
3.4.5	Stack Operation at Interrupt Processing		41
3.4.6	Stack Area for Interrupt Processing		42
3.5	Reset	................................................................................................................................................	43
3.5.1	Reset Flag Register (RSFR)		45
3.5.2	External Reset Pin		47
3.5.3	Reset Operation		48
3.5.4	State of Each Pin at Reset		50
3.6	Clock	.................................................................................................................................................	51
3.6.1	Clock Generator		53
3.6.2	Clock Controller		54
3.6.3	System Clock Control Register (SYCC)		56
3.6.4	Clock Mode		58
3.6.5	Oscillation Stabilization Wait Time		60
3.7	Standby Mode (Low-Power Consumption Mode)		62
3.7.1	Operations in Standby Mode		63
3.7.2	Sleep Mode		64
3.7.3	Stop Mode		65
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