Fujitsu MB89202, F202RA manual 12.4.2 A/D Control Register 2 ADC2, 3 A/D Control Register 2 ADC2

CHAPTER 12 A/D CONVERTER

12.4.2A/D Control Register 2 (ADC2)

A/D control register 2 (ADC2) is used to select an input clock, enable and disable an interrupt and continuous activation.

■A/D Control Register 2 (ADC2)

Figure 12.4-3 A/D Control Register 2 (ADC2)

Address bit7

0031H

bit6	bit5	bit4	bit3	bit2	bit1	bit0 Initial value
RESV4	RESV3	ADCK	ADIE	RESV2	EXT	RESV1	-0000001B
R/W	R/W	R/W	R/W	R/W	R/W	R/W

RESV1	Reserved bit
1	Be sure to write "1" to this bit.
EXT	Bit for enabling continuous activation
0	Enables activation by setting the AD bit in the ADC1 register.
1	Enables continuous activation through the clock selected in the
	ADCK bit.
RESV2	Reserved bit
	Be sure to write "0" to this bit.
0
ADIE	Enabling an interrupt request bit

0Disables the interrupt request output.

1Enables the interrupt request output.

ADCK

Selecting an input clock bit

Enabled only at continuous activation (EXT = 1)

0From the time-base timer output (28/FCH).

1From the 8/16-bit capture timer/counter output (TO).

RESV3 RESV4

0 0

R/W : Readable/ Writable

:Unused

:Initial value

Reserved bits

Be sure to write 00B to these bits.

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