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Fujitsu MB89202, F202RA manual Overview of I/O Ports, Functions of Ports

Models: F202RA MB89202

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CHAPTER 4 I/O PORTS

4.1Overview of I/O Ports

Six I/O ports (comprising 26 pins) are available as general-purpose I/O ports (parallel I/O ports).

These ports also serve peripherals (as I/O pins for specific peripheral functions).

■Functions of I/O Ports

The I/O ports function to output data from the CPU to I/O pins via their port data register (PDR) and send signals input to I/O pins to the CPU. For some ports, the I/O direction of I/O pins can be set by optionally setting the bits of the port data direction register (DDR), with the bits corresponding to the pins.

The functions of the ports and peripherals for which the ports may serve are summarized below.

•Port 0: General-purpose I/O port may also serve peripherals (external interrupt 2 and analog input pins)

•Port 3: General-purpose I/O port may also serve peripherals (12-bit PPG, external interrupt 1, UART, 8- bit serial I/O, 8/16-bit timers, and buzzer output pin)

•Port 4: General-purpose I/O port of a type switched between CMOS push-pull and N-ch open-drain may also serve peripherals (analog input pins)

•Port 5: General-purpose I/O port may also serve peripherals (8-bit PWM pin)

•Port 6: General-purpose I/O port (for MB89F202/F202RA, P61, P60 are input port)

•Port 7: General-purpose I/O port

Table 4.1-1 lists the functions of the ports, and Table 4.1-2 lists the register of ports.

Table 4.1-1

Functions of Ports

Port

Pin name

Input

Output

bit7

bit6

bit5

bit4

bit3

bit2

bit1

bit0

name

form

form

P07

P06

P05

P04

P03

P02

P01

P00

P00/INT20/

Hysteresis

Port 0

AN4 to

CMOS

AN7

AN6

AN5

AN4

INT27

INT26

INT25

INT24

P07/INT27

analog

CMOS

INT23

INT22

INT21

INT20

push-pull

P30/UCK/SCK

CMOS

P37

P36

P35

P34

P33

P32

P31

P30

Port 3

to

BZ/

TO/

UCK/

hysteresis

INT12

INT11

EC

UI/SI

UO/SO

P37/BZ/PPG

PPG

INT10

SCK

P40/AN0

CMOS

P43

P42

P41

P40

CMOS

push-pull

Port 4

to

-

-

-

-

analog

or N-ch

AN3

AN2

AN1

AN0

P43/AN3

open-drain

Port 5

P50/PWM

CMOS

CMOS

-

-

-

-

-

-

-

P50

hysteresis

push-pull

PWM

CMOS

P61

P60

Port 6

P60,

CMOS

push-pull

-

-

-

-

-

-

P61

hysteresis

or N-ch

-

-

open-drain

Port 7

P70

to

CMOS

CMOS

-

-

-

-

-

P72

P71

P70

P72

76

Image 92

Fujitsu MB89202, F202RA manual Overview of I/O Ports, Functions of Ports

F202RA, MB89202 specifications

The Fujitsu MB89202 and F202RA microcontrollers are part of the 16-bit microcontroller family, renowned for their robust performance and versatility in a variety of embedded system applications. These devices are tailored for high-efficiency operation across diverse industries, including automotive, consumer electronics, and industrial automation.

One of the main features of the MB89202 is its powerful CPU core, which operates at a clock speed of up to 20 MHz. This enables the microcontroller to perform complex calculations and consumer-grade applications seamlessly. The architecture is designed to handle multiple tasks effectively, making it suitable for real-time operations.

Memory capacity is a vital characteristic of the MB89202, featuring on-chip RAM and ROM configurations. The microcontroller can accommodate different memory variants, providing developers with flexibility in memory allocation based on their application requirements. This adaptability facilitates applications ranging from simple control systems to complex data processing tasks.

The F202RA variant extends the capabilities of the MB89202 by integrating advanced peripheral functions. It includes built-in timers, A/D converters, and serial communication interfaces, which are essential for interfacing with other hardware components or sensors. The availability of these peripherals reduces the need for additional external circuits, thus contributing to a more compact and cost-effective design.

In terms of power management, the MB89202 series employs advanced power-saving technologies. The microcontroller offers various low-power modes, enabling devices to conserve energy during idle times, making it highly suitable for battery-operated applications. This characteristic not only enhances the efficiency of devices but also extends their operational lifespan.

Moreover, the Fujitsu MB89202 series incorporates robust protection features, including watchdog timers and failure detection mechanisms. These safety features ensure reliable operation in critical systems, making them a preferred choice in applications where failure is not an option.

The MB89202 and F202RA microcontrollers also support a range of development tools and environments, including integrated development environments (IDEs) and software libraries, which facilitate rapid application development. With these tools, developers can efficiently prototype, debug, and optimize their applications.

In summary, the Fujitsu MB89202 and F202RA microcontrollers stand out with their efficient performance, extensive memory options, integrated peripherals, and power-saving capabilities, making them ideal for a wide array of embedded applications. Their reliability and robustness further enhance their attractiveness for designers seeking advanced microcontroller solutions.

Contents

F2MC-8L Page Fujitsu Limited Page Purpose of This Manual and Intended Reader Fujitsu LimitedTrademark Structure of This ManualThis chapter describes the functions and operation of Uart This appendix shows the I/O map and instructions listCopyright 2005-2008 Fujitsu Limited All rights reserved Iii Example notation of multi-use pins P33/EC pin Reading this ManualContents 115 127205 135161 225 243259 279347 313339 357 375403 Appendix aChanges For details, refer to main body RSTXii Chapter Overview Uart Features of MB89202/F202RA SeriesOverview Low-power consumption modes standby modes Up to 26 pins of I/O portsWild registers KB Flash with read protectionMB89202/F202RA Series Product Lineup 1 MB89202/F202RA Series ModelsMB89201 MB89F202/F202RA MB89V201 CmosSpecification 2 CPU and Peripheral Functions of MB89202/F202RA SeriesPWM UartDifferences between Models 1 Differences between ModelsPackage MB89201 MB89F202/F202RA MB89V202 Current consumptionBlock Diagram of MB89202/F202RA Series 1 Block Diagram of MB89202/F202RA SeriesPin Assignment 1 Pin Assignment of DIP-32P-M06Pin Assignment of FPT-34P-M03 2 Pin Assignment of FPT-34P-M03Package Dimensions Package Dimension of DIP-32P-M06Package Dimension of FPT-34P-M03 Pin No Circuit Function Name Type Pin Functions DescriptionPin Functions Description 1/2 Pin Functions Description 2/2 I/O Circuit Types Circuit Types 1/2 RemarksCircuit Types 2/2 Types Circuit RemarksOverview Precautions on Handling Devices Chapter Handling DevicesPrecautions on Handling Devices Handling DevicesStep-down circuit stabilization time Product name Operating voltage Step-down circuitOscillation stabilization wait time 218/FCH Chapter CPU Memory Space CPUArea address 0000H to 007FH RAM areaMemory Map Specific-purpose Areas Vector Table Area Address FFC0H to Ffffh1 Vector /2 Address in the vector tableFffe H Ffff H Fffb HFffd H Bit Data Storage State in Stack Location of 16-bit Data on MemoryBit Operand Storage State Dedicated Register Functions of the Dedicated RegisterProgram counter PC Accumulator aTemporary Accumulator T Index registerExtra-pointer EP Stack pointer SPCondition Code Register CCR Bits for Indicating Arithmetic Operation ResultsIL1 IL0 Bits for Controlling Acceptance of Interrupts1 Interrupt Levels 4 Configuration of Register Bank Pointer Register Bank Pointer RP1 Configuration of Register Bank General-Purpose RegistersFeatures of the General-purpose Registers Interrupts 1 Interrupt Requests and Interrupt Vectors 1/21 Interrupt Requests and Interrupt Vectors 2/2 Interrupt Level Setting Registers ILR1 to ILR4 L01 to LF1 L00 to LF0 Requested interrupt level PrioritySteps in the Interrupt Operation 2 Steps in the Interrupt OperationCPU Multiple Interrupts Example of multiple interruptsInterrupt handling time Interrupt Processing TimeInterrupt request sample wait time Stack Operation at Interrupt Processing Stack Operation at the End of Interrupt ProcessingXXH E0HStack Area for Interrupt Processing 0000H 0080H 0280HRAM ROM FfffhReset 1 Reset SourcesReset Sources and Oscillation Stabilization Wait Time Power-on resetReset Flag Register Rsfr 1 Configuration of Reset Flag Register RsfrBit name Description PonrErst WdogExternal Reset Pin Function of the External Reset PinReset Operation 3 Reset Operation FlowInfluence from a Reset of Contents in RAM Mode FetchState of Reset Waiting for Stabilization of Oscillation State of Each Pin at Reset States of Pins after the CPU Reads the Mode DataClock 1shows the clock supply map1 Clock Supply Map For an external clock Clock GeneratorFor a crystal resonator or ceramic resonator 4 Block Diagram of Clock Controller Clock ControllerOscillator System clock selectorClock controller Oscillation stabilization wait time selector5 Configuration of System Clock Control Register Sycc System Clock Control Register SyccInstruction Cycle tINST Clock Mode Gears Clock Speed Switching Function2 Operations in Each Clock Mode Sycc CS1 CPUOperations in Active Mode Oscillation Stabilization Wait Time Oscillation stabilization wait time during operationOscillation stabilization wait time at a reset Sycc WT1, WT0Stop mode Standby Mode Low-Power Consumption ModeSleep mode Operations in Standby Mode State of pins in standby modeRUN Sleep Stop SPL=0 SPL=1Cancellation of sleep mode Sleep ModeTransition to sleep mode Stop Mode Transition to stop modeStandby Control Register Stbc 1 Standby Control Register StbcSTP SLPSPL ResvDiagram for State Transition in Standby Mode 2 State Transition Diagram3 Transition to and Cancellation of Clock Mode Transition to and cancellation of standby mode4 Transition to and Cancellation of Standby Mode State transition Transition conditionsCancellation of Standby Mode by an Interrupt Stbc register Mode STPbit7 SLPbit6Oscillation Stabilization Wait Time Memory Access Mode Mode DataOperations for Selecting Memory Access Mode 1 Settings for Mode Data2 Operations for Selecting Memory Access CPU Chapter Ports Overview of I/O Ports Programming Example of I/O PortFunctions of Ports Overview of I/O PortsO Ports 2 Registers of Ports Register name Read/Write Address Initial valueXxxxxxxxb XxxxbPins of Port PortPDR0, DDR0, PUL0 Block Diagram of PortRegisters PDR0, DDR0, and PUL0 of Port Registers of Port 0 PDR0, DDR0, and PUL0 Port 0 pull-up setting register PUL0 2 Pull-up Resistor Settings PUL0Operations of Port 0 Functions Operation in stop mode 1 Pins of Port Input and output form Circuit Name Output TypeRegisters PDR3, DDR3, and PUL3 of Port PDR3, DDR3, PUL3Setting a port pin to serve external interrupts Setting the output from a peripheral enableRegisters of Port 3 PDR3, DDR3, PUL3 Port 3 data register PDR3Port 3 pull-up setting register PUL3 Name Read WriteOperations of Port 3 Functions Operation in mode enabling the output from a peripheralOperation in mode enabling the input to a peripheral P30/UCK/SCK Input Output Registers of Port PDR4, DDR4, OUT4When being written Read Address Registers of Port 4 PDR4This section describes the registers associated with port Functions of Port 4 RegistersAnalog input mode setting Operations of Port 4 FunctionsPin may serve Type Input Output Pin of PortInput and output Circuit Pin name Function Form PDR5, DDR5, PUL5 Port 5 data direction register DDR5 Registers of Port 5 PDR5, DDR5, PUL5Port 5 data register PDR5 Port 5 pull-up setting register PUL5 2 Pull-up Setting Register PUL5Operations of Port 5 Functions P50/PWM Input Output Type Serve Pins of Port Peripherals for Input and output form CircuitPin name Function 1 Block Diagram of Port6 101102 Registers PDR6, DDR6, and PUL6 of PortPDR6, DDR6, PUL6 Port 6 data direction register DDR6 for P60, P61 Registers of Port 6 PDR6, DDR6, PUL6Port 6 data register Port 6 pull-up setting register PUL6 104Operations of Port 6 Functions 106 Pins of Port Pin name Function Input and output form Circuit Output Type108 Registers PDR7, DDR7, and PUL7 of PortPDR7, DDR7, PUL7 Port 7 data direction register DDR7 Registers of Port 7 PDR7, DDR7, PUL7Port 7 data register PDR7 Port 7 pull-up setting register PUL7 110Operations of Port 7 Functions 112 Processing specification Programming Example of I/O PortCoding example 114Chapter TIME-BASE Timer Overview of Time-base Timer TIME-BASE Timer1 Time Intervals for Time-base Timer 2 Clock Cycles Supplied by Time-base Timer 1/22 Clock Cycles Supplied by Time-base Timer 2/2 117Configuration of Time-base Timer Time-base timer counterInterval timer selector Counter clear circuitTime-base Timer Control Register Tbtc 1 Time-base Timer Control Register TbtcTbof TbieTBC1, TBC0 TBRInterrupt of Time-base Timer Ffec H Ffed HOperations of Clock Supply Function Operations of Time-base Timer FunctionsOperations of Time-base Timer 2 Operations of Time-base Timer 123Clearing time-base timer Program Example for Time-base Timer Coding examplesPopw a Reti Ends END 126Chapter Watchdog Timer Overview of Watchdog Timer Watchdog Timer1 Watchdog Timer Time Intervals Time-base timer output Oscillation frequency 12.5 MHzConfiguration of Watchdog Timer Watchdog timer counter 1-bit counterReset control circuit Counter clear control circuitWTE1, WTE0 Watchdog Control Register WdtcWTE3, WTE2 Operations of Watchdog Timer Functions Activating watchdog timerClearing watchdog timer Time intervals of watchdog timerStopping watchdog timer Program Example for Watchdog Timer 134 Chapter BIT PWM Timer Overview of 8-bit PWM Timer BIT PWM Timer1 Range of Intervals and Square Wave Output Count clock cycle Interval Square wave output Hz137 PWM Timer FunctionsInternal clock Output of an 8/16-bit capture timer/counter 138 Configuration of 8-bit PWM Timer 1 Block Diagram of an 8-bit PWM TimerCount clock selector Bit counterComparator PWM generation circuit and PWM output control circuitP50/PWM pin Pin of 8-bit PWM TimerBlock Diagram of the Pin Related to the 8-bit PWM Timer Registers of 8-bit PWM Timer 1 Registers Related to the 8-bit PWM TimerPWM Control Register Cntr 2 PWM Control Register CntrBit name Function TPETIR TIEWhile the interval timer is operating PWM Compare Register ComrBit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0023H XxxxxxxxbWhile the PWM timer is operating 146Interrupt of 8-bit PWM Timer Operations of the Interval Timer Functions 1 Setting Interval Timer Functions2 Operations of an 8-bit PWM Timer 149Operations of the 8-bit PWM Timer Functions 1 Setting 8-bit PWM Timer Functions151 States in Each Mode During Operation While interval timer functions are enabled 153While PWM timer functions are enabled 15400 H 01 H 02 H 03 H 04 H This section provides notes on using 8-bit PWM timerError 156 Program Example for PWM Timer Processing specificationsPopw Reti Ends 158Program Example of PWM Timer Functions 159160 Chapter BIT Capture TIMER/ Counter Overview of 8/16-bit Capture Timer/Counter 16-BIT Capture TIMER/COUNTERCount clock cycle Interval time Square wave output range Hz 1633 Interval Time and Square Wave Output Range in 16-bit Mode 164Counter Function 165Configuration of 8/16-bit Capture Timer/Counter 1 Block Diagram of 8/16-bit Capture Timer/CounterTimer 0/1 data registers TDR0, TDR1 Timer 0/1 control registers TCR0, TCR1Bit capture timer/counter interrupt Count clock selectors 0/1P34/TO/INT10 pin Pins of 8/16-bit Capture Timer/CounterP33/EC pin Block Diagram for 8/16-bit Capture Timer/Counter Pins 169Registers of 8/16-bit Capture Timer/Counter 1 Registers of 8/16-bit Capture Timer/CounterCapture Control Register Tccr 2 Capture Control Register Tccr172 Timer 0 Control Register TCR0 3 Timer 0 Control Register TCR0174 Timer 1 Control Register TCR1 TSTR1TIF1 TFCR1T1IEN TSTR1Tsel Timer Output Control Register TCR2PEN Timer 0 Data Register TDR0 Bit mode timerBit mode 179Timer 1 Data Register TDR1 7 Timer 1 Data Register TDR1181 Capture Data Registers H and L Tcph and Tcpl Bit6 Bit5 Bit4 Bit3 Bit2 Bit1Tcph TcplTimer 0 interrupt operation in the 8-bit mode 8/16-bit Capture Timer/Counter of InterruptsBit mode Capture mode Timer Timer 0 + timer 184 FFF4 H FFF5 HFFF2 H FFF3 H Explanation of Operations of Interval Timer Functions 1 Setting of Interval Timer Function Timer2 Setting of Interval Timer Function Timer 1863 Interval Timer Function Operation in 8-bit Mode Timer 1874 Setting of Interval Timer Function in 16-bit Mode 1881 Setting of Counter Function in 8-bit Mode Operation of Counter FunctionsDetection of the number of events 1903 Setting of Counter Function in 16-bit Mode 1914 Counter Function Operation in 16-bit Mode 1921 Setting of Capture Function in 8-bit Mode Functions of Operations of Capture FunctionsCcmsk Tcmsk 2 Capture Mode Operation 1953 Setting of Capture Function in 16-bit Mode 1968/16-bit Capture Timer/Counter Operation in Each Mode 1 Counter Operation in Standby Mode and at Halfway Stop10-1 Error Occurring until the Count Operation is Started Using only timer 0 in 8-bit mode199 Program Example for 8/16-bit Capture Timer/Counter 201 Wari Clrb TIF0Popw Xchw Reti Ends END Program Example of Counter Function 202203 Xchw IncwCmpw BNE READ16 204 Chapter BIT PPG Timer Overview of 12-bit PPG Timer 12-BIT PPG TimerBit PPG Function 207208 Configuration of 12-bit PPG Timer Circuit 1 Block Diagram of 12-bit PPG Timer210 Bit PPG control registers 1 RCR21 and 2 RCR22Bit PPG control registers 3 RCR23 and 4 RCR24 Pin of 12-bit PPG Timer P37/BZ/PPG pinPUL write 212Registers of 12-bit PPG Timer Readable and Writable Unused 2131 12-bit PPG Control Register 1 RCR21 RCK1, RCK02 12-bit PPG Control Register 2 RCR22 Bit PPG Control Register 2 RCR223 12-bit PPG Control Register 3 RCR23 Bit PPG Control Register 3 RCR23Rcen 2174 12-bit PPG Control Register 4 RCR24 Bit PPG Control Register 4 RCR24Operations of 12-bit PPG Timer Functions 1 Setting 12-bit PPG Timer2 Operation of 12-bit PPG Timer 220This section provides notes on using the 12-bit PPG timer Limitation of H width settingResolution Setting change during operation1 Setting Change during 12-bit PPG Timer Operation 2 Error before Count Operation StartProgram Example for 12-bit PPG Timer 224 Chapter External Interrupt Circuit 1 Edge Overview of External Interrupt Circuit External Interrupt Circuit 1 EdgeConfiguration of External Interrupt Circuit 1 Block Diagram of External Interrupt Circuit 1 EIC1, EIC2228 Edge detecting circuitsExternal interrupt 1 control registers EIC1, EIC2 Pins of External Interrupt Circuit P35/INT11 and P36/INT12 pins1 Pins Associated with External Interrupt Circuit TCR2PEN=0230 PDRRegisters of External Interrupt Circuit 1 Registers Associated with External Interrupt CircuitExternal Interrupt Control Register 1 EIC1 2 External Interrupt Control Register 1 EIC1EIR1 EIE1EIR0 233EIE0 234External Interrupt Control Register 2 EIC2 3 External Interrupt Control Register 2 EIC2236 EIR2EIE2 Interrupt of External Interrupt Circuit 238 Exercise Caution when Changing Edge Polarity SelectionFFF8H FFF9H IRQ2 1 Setting External Interrupt Circuit Operations of External Interrupt Circuit2 Operation of External Interrupt 1 INT10 240Program Example for External Interrupt Circuit 242 Chapter External Interrupt Circuit 2 Level External Interrupt Circuit 2 Level Interrupt request generating circuit External interrupt 2 control register EIE2P00/INT20/AN4 to P03/INT23/AN7 P04/INT24 to P07/INT27INT25 INT26247 Register Bit name External interrupt pin 248EIE2 External interrupt 2 control register Address External Interrupt 2 Control Register EIE2 2 External Interrupt Circuit 2 Control Register EIE2251 External Interrupt 2 Flag Register EIF2 3 External Interrupt 2 Flag Register EIF2ILR3 007DH LA1 bit5 LA0 bit4 EIE2 2 Operation of External Interrupt 2 INT20 255Aden EQU EIE2 EQUEIF2 EQU Intv Dseg ABS Data Segment ORG 0FFE6H Irqa Wari257 Pushw a Xchw A,TPopw a Xchw A,T Reti Ends END 258 Chapter Converter Overview of A/D Converter D ConverterConfiguration of A/D Converter 1 Block Diagram of the A/D ConverterClock selector Analog channel selectorSample hold circuit ConverterPins of A/D Converter P03/INT23/AN7 to P00/INT20/AN4 and P43/AN3 to P40/AN0Block Diagram of the Pins Related to the A/D Converter 264Registers of A/D Converter 1 Registers Related to the A/D Converter12.4.1 A/D Control Register 1 ADC1 2 A/D Control Register 1 ADC1ANS2, ANS1, ANS0 ADIAdmv RESV012.4.2 A/D Control Register 2 ADC2 3 A/D Control Register 2 ADC2269 When A/D conversion functions are enabled 12.4.3 A/D Data Register Addh and Addl12.4.4 A/D Enable Register Aden 5 A/D Enable Register AdenInterrupt of A/D Converter Continuous activation Operations of A/D Converter FunctionsSoftware activation Operations of A/D Conversion Functions 274This section describes notes on using the A/D converter Input impedance of the analog input276 Conversion timeInput clock of continuous activation Program Example for A/D Converter 278 MOV AddlMOV Addh Chapter Uart This chapter describes the functions and operations of UartOverview of Uart 1 Uart Operating Modes281 Serial SwitchChoice of the Transfer Clock Rate Asynchronous transfer mode Synchronous transfer mode 282Divider for clock Transfer rate bps 283Configuration of Uart 1 Block Diagram of UartSerial mode control register SMC Clock generatorReception control circuit Transmission control circuitUart interrupt sources 286Pins of Uart P30/UCK/SCKP31/UO/SO P32/UI/SIBlock Diagram of the UART-relating Pins 288Registers of Uart 1shows the UART-relating registers UART-relating RegistersSerial Mode Control Register SMC 2 Serial Mode Control Register SMCSBL SmdeScke SOESerial Rate Control Register SRC 3 Serial Rate Control Register SRC293 Serial Status and Data Register SSD 4 Serial Status and Data Register SSD295 Receiving Status 296When operating mode is 0, 1, or When operating mode isSerial Input Data Register Sidr Serial Input Data Register SidrSerial Output Data Register Sodr 7 Serial Output Data Register SodrClock Divider Selection Register UPC 8 Clock Divider Selection Register UPCPren 300Ssel Serial Switch Register Ssel5 Description of the Serial Switch Register Ssel Bits 10 Block Diagram of Serial Switch Register 302Interrupt of Uart Reception InterruptUart Interrupt Related Registers and Vector Table Addresses FFF0H FFF1H IRQ6Operations of Uart Functions 1 Transferred Data FormatTheory of Operation for Operating Mode 0, 1, 2, 305Transmission Operations Operating Mode 0, 1, 2, 3 Transmission Operations in Operating Mode 0, 1, 2, orReception Operations Operating Mode 0, 1, or 4 Reception Operations in Operating Mode 0, 1, or308 Reception Operations Operating Mode 2 Only 7 Reception Operations in Operating Mode310 Program specifications Program Example for Uart312 Chapter BIT Serial I/O Serial Function Switching Overview of 8-Bit Serial I/OBIT Serial I/O 1 Shift Clock Cycle and Transfer RateConfiguration of 8-Bit Serial I/O 1 Block Diagram of 8-bit Serial I/OSerial mode register SMR Shift clock control circuitShift clock counter Bit serial I/O interruptPins of 8-Bit Serial I/O P32/UI/SI pinP31/UO/SO pin P30/UCK/SCK pinBlock Diagram for 8-bit Serial I/O Pins 318Registers of 8-Bit Serial I/O Bit Serial I/O RegistersSerial Mode Register SMR 2 Serial Mode Register SMRSiof SioeCKS1, CKS0 321322 BDSSST When the serial I/O is in transfer operation Serial Data Register SDRSerial Data Register SDR At serial output operation1 8-bit Serial I/O Interrupt Register and Vector Table Interrupt of 8-Bit Serial I/OBit Serial I/O Interrupt Register and Vector Table Operations of Serial Output Functions Serial output operation via internal shift clock326 Serial output operation using external shift clockOperation at Serial Output Completion Serial input operation using internal shift clock Operations of Serial Input Functions328 Serial input operation using external shift clockOperation at Serial Input Completion Bit serial I/O operation in stop mode 14.8 8-Bit Serial I/O Operation in Each ModeBit serial I/O operation in sleep mode 330 When the External Shift Clock is Used 331332 This section provides notes on using the 8-bit serial I/O Error at serial transfer startMalfunction due to noise Shift clock idle stateExample of 8-Bit Serial I/O Connection Bidirectional Serial I/O Operation 335Program Example for 8-Bit Serial I/O Program Example for 8-bit Serial Input Wari Clrb SiofPushw MOV Popw Reti Ends ENDPushw Xchw MOV SDR 338Chapter Buzzer Output Overview of the Buzzer Output Buzzer Output1 Output Frequencies Clock supplier Buzzer output Square wave output at 12.5 MHzConfiguration of the Buzzer Output Buzzer output selectorBZ pin Block Diagram of the Pin Related to the Buzzer OutputPin of the Buzzer Output Buzzer Register Bzcr 1 Buzzer Register Bzcr1 Functions of Each Bit in Buzzer Register Bzcr 344Program Example for Buzzer Output Bzcr EQU346 Chapter Wild Register Function Overview of the Wild Register Function Wild Register Applicable AddressesWild Register Function 1 Wild Register Applicable AddressesControl circuit part Configuration of the Wild Register FunctionMemory area part Registers of the Wild Register Function 1 Registers Related to Wild Register FunctionData Setting Registers WRDR0 and WRDR1 1 Functions of Data Setting Register WrdrWild register number Register name Function WRDR0Higher Address Set Registers WRARH0 and WRARH1 2 Functions of Higher Address Set Register WrarhWRARH0 WRARH1Lower Address Set Registers WRARL0 and WRARL1 3 Functions of Lower Address Set Register WrarlWRARL0 WRARL1Address Comparison EN Register Wren 5 Address Comparison EN Register WrenTest register. Do not access this register Data Test Set Register WrorOperations of the Wild Register Functions Wild Register Addresses List1 Operation Order of Wild Register 2 Wild Register Addresses ListChapter Flash Memory Overview of Flash Memory Writing to/Erasing Flash MemoryFlash Memory Register Flash MemoryFlash Memory Control Status Register Fmcs 1 Flash Memory Control Status Register FmcsInte 3601 Command Sequence Table Starting the Flash Memory Automatic AlgorithmConfirming the Automatic Algorithm Execution State 1 Bit Assignments of Hardware Sequence Flags2 Hardware Sequence Flag Functions StateData Polling Flag DQ7 Automatic ErasingToggle Bit Flag DQ6 Timing Limit Exceeded Flag DQ5 Toggle Bit-2 Flag DQ2 Detailed Explanation of Writing to Erasing Flash Memory Setting The Read/Reset State Writing to the Flash Memory Writing DataSpecifying Addresses 1 Example of the Flash Memory Write Procedure 370Erasing All Data Erasing Chips Flash Security Feature How to enable the Flash Security FeatureHow to disable the Flash Security Feature Behavior under the Flash Security FeatureFlash Content Protection Software Reset, Watchdog Timer ResetProgram Access to Flash Memory 374 Appendix Table A-1 Map 1 Appendix a I/O MapAppendix a I/O Map Table A-1 Map 2 377Table A-1 Map 3 378Table A-1 Map 4 Explanation on read/writeExplanation on initial value 379Appendix B Overview of the Instructions Explanation on the Codes Representing Instructions Table B-1 Explanation on Codes on Instructions’ ListCode Meaning CCR382 Explanation on the Items of Instructions’ ListTable B-2 Explanation on Items of Instructions’ List Extended Addressing AddressingDirect addressing 384 Index addressingPointer Addressing General-purpose Register Addressing Immediate AddressingVector Addressing Table B.1-1 Vector Table Address Corresponding to vct386 Relative AddressingInherent addressing Movw A, PC Special InstructionsJMP @A 388 Mulu aDivu a Xchw A, PC 389Appendix B Overview of the Instructions Callv #vct 390Bit Manipulation Instructions Setb and Clrb Table B.3-1 Bus Operation at Bit Manipulation InstructionsCode Mnemonic RMWF2MC-8L Instructions List Table B.4-1 List of Transfer Instructions 1Table B.4-1 List of Transfer Instructions 2 393394 Operation InstructionsTable B.4-2 List of Operation Instructions 1 Table B.4-2 List of Operation Instructions 2 395Table B.4-2 List of Operation Instructions 3 396Branch Instructions Table B.4-2 List of Operation Instructions 4Table B.4-3 List Branch Instructions 397398 Other InstructionsTable B.4-4 List of Other Instructions Instruction Map Instruction MapTable B.5-1 shows the instruction map of the F2MC-8L Instruction Map of the FAppendix C Mask Options Table C-1 Mask OptionsProgramming Eprom Appendix D Programming Eprom with Evaluation ChipEprom for use Table E-1 Pin States in Each Operation Mode Appendix E Pin State of the MB89202/F202RA SeriesAppendix E Pin State of the MB89202/F202RA Series P37/BZ/PPGIndex follows on the next This is listed in alphabetic order 403Numerics ADC AdenCntr BzcrCCR Comr DDREIC EIEF2MC-8L FmcsILR Interrupt Enable Bits Interrupt Level Setting RegistersInterval Timer Memory AccessOUT P37/BZ/PPG PDRPUL RCRSDR RsfrRST Sidr SMCSMR SodrTbtc TccrTCR TDRWdtc WrarhWrarl Wrdr418 Fujitsu Semiconductor Controller Manual CM25-10153-2E