Fujitsu F202RA, MB89202 4.4.1 Registers of Port 4 (PDR4)

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CHAPTER 4 I/O PORTS
4.4.1 Registers of Port 4 (PDR4)
This section describes the registers associated with port 4.
■Functions of Port 4 Registers
●Port 4 data register (PDR4)
The PDR4 register indicates the state of the pins. For a pin set to function as an output port, the same value
("0"or "1") as held by the output latch can be read from this register. If the pin is set to function as an input
port, however, its output latch value cannot be read from the register.
Note:
When a bit manipulation instruction (SETB, CLRB) is executed, the output latch values, not the value
states of the pins, are read; thus, output latch values, excepting those for bits to be manipulated, do not
change.
Table 4.4-3 lists the functions of the port 4 registers.
Table 4.4-3 Functions of Port 4 Registers
Register
name Data When being read When being written Read/ Write Address Initial value
Port 4
data
register
(PDR4)
0 Pin state is "L" level. Output latch of "0" is set and "L" level is output to the pin
in output port mode.
R/W 000FH----XXXXB
1Pin state is "H"
level.
N-ch open-
drain type
Output latch of "1" is set and
the pin in output port mode
is set at Hi-Z.
CMOS
push-pull
type
Output latch of "1" is set and
"H" level is output to the pin
in output port mode.
Port 4
data
direction
register
(DDR4)
0 Input port pin The pin is set to function as input pin with output
transistor operation disabled. R/W 0010H----0000B
1 Output port pin The pin is set to function as output pin with output
transistor operation enabled.
Port 4
output
format
setting
register
(OUT4)
0 N-ch open-drain type Output format of the pin is
set to N-ch open-drain type.
R/W 0011H----0000B
1 CMOS push-pull type Output format of the pin is
set to CMOS push-pull type.
R/W: Readable and Writable
X : Undefined