190
CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
Detection of the number of eventsIn the external clock mode, counter clear can be prohibited by the compare match counter clear mask bit(TCMSK) of the capture control register (TCCR) when a match is detected. Setting the compare matchcounter clear mask bit to "1" enables the event count detection function to be used. In this case, a comparematch does not cause data to be re-loaded to the compare latch. To update the compare latch value, stopand restart the timer.Figure 8.7-2 shows counter function operation in the external clock mode in which TCMSK is used.Figure 8.7-2 Counter Function Operation in External Clock Mode
00H01H02H03H7EH7FH00H01H
00
7F
00H01H02H03H7EH7FH80H81H
00
TFCR0=1 (W)
7FH
7FH
FFH55H
FFH
EC
TSTR0=1
TDR0
TCMSK=0
Compare latch
Counter clear
Counter value
Un-
defined
Un-
defined
Compare latch
Counter clear
Counter value
TIF0
TCMSK=1