CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER

Program Example of Counter Function

Processing specifications

In the 16-bit mode, timer 0 and timer 1 are used to generate an interrupt whenever the external clock to be input to the EC pin is counted 5,000 times (1388H).

The sample program for reading the 16-bit counter value when the counter is in operation is shown below (READ16).

Coding example

DDR3

EQU

000DH

;

Address of port 3-direction register

TCCR

EQU

0019H

;

Address of capture control register

TCR1

EQU

001AH

;

Address of timer 1 control register

TCR0

EQU

001BH

;

Address of timer 0 control register

TDR1

EQU

001CH

;

Address of timer 1 data register

TDR0

EQU

001DH

;

Address of timer 0 data register

TIF0

EQU

TCR0:7

;

Defines the timer 0 interrupt request flag bit.

ILR1

EQU

007CH

;

Address of interrupt level setting register 2

INT_V

DSEG

ABS

;

[DATA SEGMENT]

 

ORG

0FFF0H

 

 

IRQD

DW

WARI

;

Sets the interrupt vector.

 

ENDS

 

 

 

;------------------------

Main program---------------------------------------------------------------------------------

 

 

CSEG

 

;

[CODE SEGMENT]

 

 

 

; The stack pointer (SP), etc., is already initialized.

 

:

 

 

 

 

MOV

DDR3,#00000000B

;

Sets the EC pin to input.

 

CLRI

 

;

Disables the interrupt.

 

MOV

ILR1,#10111111B

;

Sets the interrupt level to 2.

 

MOV

TDR0,#088H

;

Sets the counter value and the lower 8 bits of the

 

 

 

 

compare value.

 

MOV

TDR1,#013H

;

Sets the counter value and the higher 8 bits of the

 

 

 

 

compare value.

 

MOV

TCR1,#00001110B

;

Sets timer 1 to 16-bit mode.

 

MOV

TCR0,#01101111B

;

Clears the timer 0 interrupt request flag, allows interrupt

 

 

 

 

request output, selects an external clock, clears the

 

 

 

 

counter, starts the operation, and increments the counter

 

 

 

 

at a rising edge.

 

SETI

 

; Enables a CPU interrupt.

;------------------------

Data read subroutine-------------------------------------------------------------------------

 

READ16

 

 

 

 

 

MOVW

A,TDR1

;

Reads 16 bits from TDR1 and TDR0.

 

MOVW

A,TDR1

;

Reads 16 bits from TDR1 and TDR0 and stores the old

 

 

 

 

value in the T register.

 

CMPW

A

;

Executes double read check and compares A with T.

 

BEQ

RET16

;

Match and return

202

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Fujitsu MB89202, F202RA manual Program Example of Counter Function

F202RA, MB89202 specifications

The Fujitsu MB89202 and F202RA microcontrollers are part of the 16-bit microcontroller family, renowned for their robust performance and versatility in a variety of embedded system applications. These devices are tailored for high-efficiency operation across diverse industries, including automotive, consumer electronics, and industrial automation.

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Memory capacity is a vital characteristic of the MB89202, featuring on-chip RAM and ROM configurations. The microcontroller can accommodate different memory variants, providing developers with flexibility in memory allocation based on their application requirements. This adaptability facilitates applications ranging from simple control systems to complex data processing tasks.

The F202RA variant extends the capabilities of the MB89202 by integrating advanced peripheral functions. It includes built-in timers, A/D converters, and serial communication interfaces, which are essential for interfacing with other hardware components or sensors. The availability of these peripherals reduces the need for additional external circuits, thus contributing to a more compact and cost-effective design.

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