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Technical Reference Guide
C.2.1 PS/2-TYPE KEYBOARD TRANSMISSIONS
The
Tcy
Tcl
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Clock |
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| (LSb) |
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| Start |
| Data |
| Data |
| Data | Data |
| Data |
| Data |
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Data | Bit |
| 0 |
| 1 |
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| 5 | 6 |
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| Parameter |
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| Minimum |
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| Tcy (clock cycle) |
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| 60 us |
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| 80 us |
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| Tcl (clock low) |
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| 30 us |
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| 41 us |
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| 50 us |
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| Tch (clock high) |
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| 30 us |
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| 40 us |
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| 20 us |
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Stop
Bit
Figure C–2. PS/2 Keyboard-To-System Transmission, Timing Diagram
The system can halt keyboard transmission by setting the clock signal low. The keyboard checks the clock line every 60 µs to verify the state of the signal. If a low is detected, the keyboard will finish the current transmission if the rising edge of the clock pulse for the parity bit has not occurred. The system uses the same timing relationships during reads (typically with slightly reduced time periods).
The enhanced keyboard has three operating modes:
♦Mode 1 - PC-XT compatible
♦Mode 2 - PC-AT compatible (default)
♦Mode 3 - Select mode (keys are programmable as to make-only, break-only, typematic)
Modes can be selected by the user or set by the system. Mode 2 is the default mode. Each mode produces a different set of scan codes. When a key is pressed, the keyboard processor sends that key’s make code to the 8042 logic of the system unit. The When the key is released, a release code is transmitted as well (except for the Pause key, which produces only a make code). The 8042-type logic of the system unit responds to scan code reception by asserting IRQ1, which is processed by the interrupt logic and serviced by the CPU with an interrupt service routine. The service routine takes the appropriate action based on which key was pressed.
hp/Compaq Personal Computers |
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