Technical Reference Guide
CHAPTER 3 PROCESSOR/MEMORY SUBSYSTEM | |||
3.1 |
| INTRODUCTION | |
3.2 |
| ATHLON XP PROCESSOR | |
3.2.1 | PROCESSOR OVERVIEW | ||
3.2.2 | PROCESSOR UPGRADING | ||
3.3 |
| MEMORY SUBSYSTEM | |
CHAPTER 4 SYSTEM SUPPORT | |||
4.1 |
| INTRODUCTION | |
4.2 |
| PCI BUS OVERVIEW | |
4.2.1 | PCI BUS TRANSACTIONS | ||
4.2.2 PCI BUS MASTER ARBITRATION | |||
4.2.3 | OPTION ROM MAPPING | ||
4.2.4 | PCI INTERRUPTS | ||
4.2.5 PCI POWER MANAGEMENT SUPPORT | |||
4.2.6 | PCI | ||
4.2.7 | PCI CONNECTOR | ||
4.3 |
| AGP BUS OVERVIEW | |
4.3.1 | BUS TRANSACTIONS | ||
4.3.2 | AGP CONNECTOR | ||
4.4 |
| SYSTEM RESOURCES | |
4.4.1 | INTERRUPTS | ||
4.4.2 | DIRECT MEMORY ACCESS | ||
4.5 |
| SYSTEM CLOCK DISTRIBUTION | |
4.6 | |||
4.6.1 | CLEARING CMOS | ||
4.6.2 CMOS ARCHIVE AND RESTORE | |||
4.6.3 | STANDARD CMOS LOCATIONS | ||
4.7 |
| SYSTEM MANAGEMENT | |
4.7.1 | SECURITY FUNCTIONS | ||
4.7.2 | POWER MANAGEMENT | ||
4.7.3 | SYSTEM STATUS | ||
4.7.4 THERMAL SENSING AND COOLING | |||
4.8 | REGISTER MAP AND MISCELLANEOUS FUNCTIONS | ||
4.8.1 | SYSTEM I/O MAP | ||
4.8.2 LPC47B367 I/O CONTROLLER FUNCTIONS |
ivCompaq D315 and hp d325 Personal Computers Featuring the AMD Athlon XP Processor