NXP Semiconductors LPC2919, LPC2917 Soldering, Package outline, Contact information Contents

Page 68

NXP Semiconductors

8.7Modulation and sampling control subsystem . 31

8.7.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

DRAFT

D

D

 

AFT

RAFT

RAFT AFT

 

 

 

DR

DR

 

DLPC2917/19

 

 

ARM9 microcontrollerRAFT

withDRAFTCANDRAFTand LINDRAFT

 

 

T DRAFT

T

 

DRA

DRA

DR

14

Soldering

F

F

. . . .DRAFT. . . . . . . DRAFT. . . 59

DRAF

13

Package outline

. . . . . . . . . . . . .

. 58

 

8.7.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

8.7.2.1Synchronization and trigger features of the

MSCSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

8.7.3 MSCSS pin description. . . . . . . . . . . . . . . . . . 34

8.7.4 MSCSS clock description . . . . . . . . . . . . . . . . 34

8.7.5 Analog-to-digital converter . . . . . . . . . . . . . . . 35 8.7.5.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.7.5.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.7.5.3 ADC pin description . . . . . . . . . . . . . . . . . . . . 36 8.7.5.4 ADC clock description . . . . . . . . . . . . . . . . . . 37

14.1 Introduction . . . . . . . . . . . . . . . . . . . . .

14.2 Through-hole mount packages . . . . . .

14.2.1Soldering by dipping or by solder wave

14.2.2Manual soldering . . . . . . . . . . . . . . . . .

14.3

Surface mount packages

14.3.1

Reflow soldering

14.3.2

Wave soldering

14.3.3

Manual soldering

14.4Package related soldering information.

DRAFT DRAFT

. . . . . 59

 

 

. . . . . 59

 

 

. . . . . 59

 

D

DRAFT

 

. . . . . 59

 

 

. . . . . 59

DRA

. . . . . 59

 

 

. . . . . 60

. . . . . 61

. . . . . 61

8.7.6 PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 8.7.6.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 8.7.6.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 8.7.6.3 Synchronizing the PWM counters. . . . . . . . . . 38 8.7.6.4 Master and slave mode . . . . . . . . . . . . . . . . . 39 8.7.6.5 PWM pin description. . . . . . . . . . . . . . . . . . . . 39 8.7.6.6 PWM clock description . . . . . . . . . . . . . . . . . . 39

8.7.7 Timers in the MSCSS . . . . . . . . . . . . . . . . . . . 40 8.7.7.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 8.7.7.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 8.7.7.3 MSCSS timer-pin description . . . . . . . . . . . . . 40 8.7.7.4 MSCSS timer-clock description . . . . . . . . . . . 40

8.8 Power, clock and reset control subsystem . . . 40

8.8.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.8.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.8.3 PCR subsystem clock description . . . . . . . . . 41

8.8.4 Clock Generation Unit (CGU) . . . . . . . . . . . . . 41 8.8.4.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 8.8.4.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 8.8.4.3 PLL functional description . . . . . . . . . . . . . . . 45 8.8.4.4 CGU pin description . . . . . . . . . . . . . . . . . . . . 46

8.8.5 Reset Generation Unit (RGU). . . . . . . . . . . . . 47 8.8.5.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 8.8.5.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 8.8.5.3 RGU pin description . . . . . . . . . . . . . . . . . . . . 48

8.8.6 Power Management Unit (PMU). . . . . . . . . . . 48 8.8.6.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 8.8.6.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 8.8.6.3 PMU pin description . . . . . . . . . . . . . . . . . . . . 50

8.9 Vectored interrupt controller . . . . . . . . . . . . . . 50

8.9.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

8.9.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

8.9.3 VIC pin description . . . . . . . . . . . . . . . . . . . . . 51

8.9.4 VIC clock description . . . . . . . . . . . . . . . . . . . 51

9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 51

10 Thermal characteristics . . . . . . . . . . . . . . . . . 52

11 Static characteristics. . . . . . . . . . . . . . . . . . . . 53

12 Dynamic characteristics . . . . . . . . . . . . . . . . . 55

15 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 63

16 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

17 Revision history . . . . . . . . . . . . . . . . . . . . . . . 65

18 Legal information . . . . . . . . . . . . . . . . . . . . . . 66

18.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 66

18.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

18.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 66

18.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 66

19 Contact information . . . . . . . . . . . . . . . . . . . . 67

20 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

© NXP B.V. 2007.

All rights reserved.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 15 November 2007

Document identifier: LPC2917_19_1

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Contents Introduction General descriptionAbout this document Intended audienceOn-chip flash memory system NXP SemiconductorsARM968E-S processor General FeaturesOn-chip static RAM Ordering information Ordering optionsOrdering information Part optionsBlock diagram LPC2917/19 block diagramPinning information PinningPin description General descriptionSymbol Pin Description Function 0 default LQFP144 pin assignment …TIMER2 MAT2 PWM TRAP1 TIMER2 MAT3 PWM TRAP0TIMER1 MAT0 EXTINT0 TIMER1 MAT1 EXTINT1LQFP144 pin SymbolPin Description Reset, debug, test and power description Reset and power-up behaviorReset strategy Reset pinIeee 1149.1 interface pins Jtag boundary-scan test Power supply pins descriptionClocking strategy Clock architectureLPC2917/19 block diagram, overview of clock areas LPC2917/19Base clock and branch clock relationship Base clock and branch clock overviewBase clock Branch clock name Parts of the device clocked by This branch clockBlock description Flash memory controllerOverview Base clockDRA DescriptionFlash layout Flash memory controller pin descriptionFlash memory controller clock description Flash bridge wait-states Flash sector overview …External memory-bank address bit description 32 bit Symbol Description System Address Bit FieldExternal static memory controller External memory timing diagrams External memory controller pinsExternal static-memory controller pin description External static-memory controller clock descriptionReading from external memory Writing to external memoryReading/writing external memory Chip and feature identification General subsystemGeneral subsystem clock description System Control Unit SCUSymbol Direction Bit position Description Default Polarity Peripheral subsystemPeripheral subsystem clock description Event-router pin connectionsPin description TimerWatchdog timer clock description 3.2 Description 3.3 Pin descriptionTimer clock description Timer pinsUart pins UARTsFunctional description Serial peripheral interfaceUart clock description SPI pins Modes of operationSPI pin description SPI clock descriptionGpio pins General-purpose I/O6.1 Overview Gpio pin descriptionCan pins Can gatewayLIN Global acceptance filterLIN controller pins Modulation and sampling control subsystemLIN pin description LIN0/1 TxdlSynchronization and trigger features of the Mscss Modulation and sampling control subsystem block diagramStart ADC conditions is valid Mscss pin description Mscss clock descriptionDraft Analog-to-digital converterADC pin description ADC block diagramAnalog to digital converter pins 6 PWM ADC clock descriptionPWM block diagram Synchronizing the PWM countersTimers in the Mscss Master and slave modePWM pins PWM pin descriptionPower, clock and reset control subsystem Mscss timer-clock descriptionMscss timer 1 pin Pause pin for Mscss timerClock Generation Unit CGU Pcrss block diagramPCR subsystem clock description CGU base clocks Number Name Frequency Description MHzBlock diagram of the CGU Structure of the clock generation scheme PLL functional description CGU pin description PLL block diagramCGU pins Reset Generation Unit RGU Reset output configurationRGU pin description Power Management Unit PMURGU pins DRA Vectored interrupt controller PMU pin descriptionVIC clock description Limiting valuesVIC pin description Thermal characteristics Static characteristics Static characteristicsSymbol Parameter Conditions Min Typ Max Input pins and I/O pins configured as inputAnalog-to-digital converter supply VDDA5V FSRINL LSBDynamic characteristics Power-up resetDynamic characteristics Symbol Parameter Conditions Min Typ Max UnitUnitDRAFT Jitter Specification Can TXD pin Cycle-to-cycle jitter Peak-to-peak valuePackage outline Package outline SOT486-1 LQFP144Soldering IntroductionThrough-hole mount packages Surface mount packagesVolume mm3 350 235 220 Lead-free process from J-STD-020C Temperature profiles for large and small componentsWave soldering SnPb eutectic process from J-STD-020C Package thickness mmPackage related soldering information Mounting Package1 Soldering method Wave Reflow2 DippingCPGA, Hcpga DBS, DIP, HDIP, RDBS, SDIP, SILMounting Abbreviation Description AbbreviationsAbbreviations list References Revision history Document ID Release date Data sheet statusRevision history Legal information Contact informationContents Package outline Contact information ContentsSoldering
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