ADuC812

ECON—Flash/EE Memory Control SFR

This SFR acts as a command interpreter and may be written with one of five command modes to enable various read, pro- gram and erase cycles as detailed in Table VII:

Table VII. ECON–Flash/EE Memory Control Register Command Modes

Command Byte

Command Mode

 

 

01H

READ COMMAND

 

Results in four bytes being read into

 

EDATA 1–4 from memory page address

 

contained in EADRL.

02H

PROGRAM COMMAND

 

Results in four bytes (EDATA 1–4) being

 

written to memory page address in EADRL.

 

This write command assumes the designated

 

“write” page has been pre-erased.

03H

RESERVED FOR INTERNAL USE

 

03H should not be written to the

 

ECON SFR.

04H

VERIFY COMMAND

 

Allows the user to verify if data in EDATA

 

1–4 is contained in page address designated

 

by EADRL.

 

A subsequent read of the ECON SFR will

 

result in a “zero” being read if the verifi-

 

cation is valid, a nonzero value will be

 

read to indicate an invalid verification.

05H

ERASE COMMAND

 

Results in an erase of the 4-byte page

 

designated in EADRL.

06H

ERASE-ALL COMMAND

 

Results in erase of the full Flash/EE data

 

memory 160-page (640 bytes) array.

07H to FFH

RESERVED COMMANDS

 

Commands reserved for future use.

 

 

Flash/EE Memory Timing

The typical program/erase times for the Flash/EE Data Memory are:

Erase Full Array (640 Bytes)

– 20 ms

Erase Single Page (4 Bytes)

– 20 ms

Program Page (4 Bytes)

250 ∝s

Read Page (4 Bytes)

Within Single Instruction Cycle

Flash/EE erase and program timing is derived from the master clock. When using a master clock frequency of 11.0592 MHz it is not necessary to write to the ETIM registers at all. However, when operating at other master clock frequencies (fCLK), you must change the values of ETIM1 and ETIM2 to avoid degrad- ing data Flash/EE endurance and retention. ETIM1 and ETIM2 form a 16-bit word, ETIM2 being the high byte and ETIM1 the low byte. The value of this 16-bit word must be set as follows to ensure optimum data Flash/EE endurance and retention.

ETIM2, ETIM1 = 100 ∝s fCLK

ETIM3 should always remain at its default value of 201 dec/C9 hex.

Using the Flash/EE Memory Interface

As with all Flash/EE memory architectures, the array can be pro- grammed in system at a byte level, although it must be erased first, the erasure being performed in page blocks (4-byte pages in this case).

A typical access to the Flash/EE array will involve setting up the page address to be accessed in the EADRL SFR, configuring the EDATA1-4 with data to be programmed to the array (the EDATA SFRs will not be written for read accesses) and finally writing the ECON command word which initiates one of the six modes shown in Table VII. It should be noted that a given mode of operation is initiated as soon as the command word is written to the ECON SFR. The core microcontroller operation on the ADuC812 is idled until the requested Program/Read or Erase mode is completed.

In practice, this means that even though the Flash/EE memory mode of operation is typically initiated with a two-machine cycle MOV instruction (to write to the ECON SFR), the next instruction will not be executed until the Flash/EE operation is complete (250 ∝s or 20 ms later). This means that the core will not respond to Interrupt requests until the Flash/EE operation is complete, although the core peripheral functions like Counter/Timers will continue to count and time as configured throughout this pseudo- idle period.

Erase-All

Although the 640-byte User Flash/EE array is shipped from the factory pre-erased, i.e., Byte locations set to FFH, it is nonethe- less good programming practice to include an erase-all routine as part of any configuration/setup code running on the ADuC812. An “ERASE-ALL” command consists of writing “06H” to the ECON SFR, which initiates an erase of all 640 byte locations in the Flash/EE array. This command coded in 8051 assembly would appear as:

MOV ECON, #06H

; Erase all Command

 

; 20 ms Duration

Program a Byte

In general terms, a byte in the Flash/EE array can only be pro- grammed if it has previously been erased. To be more specific, a byte can only be programmed if it already holds the value FFH. Because of the Flash/EE architecture, this erasure must happen at a page level; therefore, a minimum of four bytes (1 page) will be erased when an erase command is initiated. A more specific example of the Program-Byte process is shown below. In this example the user writes F3H into the second byte on Page 03H of the Flash/EE Data Memory space while preserving the other three bytes already in this page. As the user is only required to modify one of the page bytes, the full page must be first read so that this page can then be erased without the existing data being lost. This example, coded in 8051 assembly, would appear as:

MOV

EADRL, #03H

; Set Page Address Pointer

MOV

ECON, #01H

; Read Page

MOV

EDATA2, #0F3H

; Write New Byte

MOV

ECON, #05H

; Erase Page

MOV

ECON, #02H

; Write Page (Program

 

 

Flash/EE)

–20–

REV. B

Page 20
Image 20
Analog Devices ADuC812 manual Command Byte Command Mode