ADuC812
SPECIAL FUNCTION REGISTERS
All registers except the program counter and the four general purpose register banks, reside in the special function register (SFR) area. The SFR registers include control, configuration and data registers that provide an interface between the CPU and other on- chip peripherals.
Figure 4 shows a full SFR memory map and SFR contents on Reset. Unoccupied SFR locations are shown dark-shaded in the figure below (NOT USED). Unoccupied locations in the SFR address space are not implemented i.e., no register exists at this location. If an unoccupied location is read, an unspecified value is returned. SFR locations reserved for on chip testing are shown lighter shaded below (RESERVED) and should not be accessed by user software. Sixteen of the SFR locations are also bit addressable and denoted by '1' in the figure below, i.e., the bit addressable SFRs are those whose address ends in 0H or 8H.
ISPI |
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| WCOL |
| SPE |
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| SPIM |
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| CPOL |
| CPHA |
| SPR1 |
| SPR0 |
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FFH | 0 |
| FEH | 0 |
| FDH | 0 |
| FCH | 0 |
| FBH | 0 |
| FAH | 0 |
| F9H | 0 |
| F8H | 0 |
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F7H | 0 |
| F6H | 0 |
| F5H | 0 |
| F4H | 0 |
| F3H | 0 |
| F2H | 0 |
| F1H | 0 |
| F0H | 0 |
| BITS |
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MDO |
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| MDE |
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| MCO |
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| MDI |
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| I2CM |
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| I2CRS |
| I2CTX |
| I2CI |
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EFH | 0 |
| EEH | 0 |
| EDH | 0 |
| ECH | 0 |
| EBH | 0 |
| EAH | 0 |
| E9H | 0 |
| E8H | 0 |
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E7H | 0 |
| E6H | 0 |
| E5H | 0 |
| E4H | 0 |
| E3H | 0 |
| E2H | 0 |
| E1H | 0 |
| E0H | 0 |
| BITS |
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ADCI |
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| DMA |
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| CCONV |
| SCONV |
| CS3 |
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| CS2 |
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| CS1 |
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| CS0 |
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| BITS | ||
DFH | 0 |
| DEH | 0 |
| DDH | 0 |
| DCH | 0 |
| DBH | 0 |
| DAH | 0 |
| D9H | 0 |
| D8H | 0 |
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CY |
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| AC |
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| F0 |
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| RS1 |
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| RS0 |
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| OV |
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| FI |
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| P |
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| BITS |
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D7H | 0 |
| D6H | 0 |
| D5H | 0 |
| D4H | 0 |
| D3H | 0 |
| D2H | 0 |
| D1H | 0 |
| D0H | 0 |
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TF2 |
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| EXF2 |
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| RCLK |
| TCLK |
| EXEN2 |
| TR2 |
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| CNT2 |
| CAP2 |
| BITS | |||||
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CFH | 0 |
| CEH | 0 |
| CDH | 0 |
| CCH | 0 |
| CBH | 0 |
| CAH | 0 |
| C9H | 0 |
| C8H | 0 |
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PRE2 |
| PRE1 |
| PRE0 |
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| WDR1 |
| WDR2 |
| WDS |
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| WDE |
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| BITS | |||||
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C7H | 0 |
| C6H | 0 |
| C5H | 0 |
| C4H | 0 |
| C3H | 0 |
| C2H | 0 |
| C1H | 0 |
| C0H | 0 |
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PSI |
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| PADC |
| PT2 |
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| PS |
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| PT1 |
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| PX1 |
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| PT0 |
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| PX0 |
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BFH | 0 |
| BEH | 0 |
| BDH | 0 |
| BCH | 0 |
| BBH | 0 |
| BAH | 0 |
| B9H | 0 |
| B8H | 0 |
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RD |
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| WR |
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| T1 |
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| T0 |
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| INT1 |
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| INT0 |
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| TxD |
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| RxD |
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| BITS |
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B7H | 1 |
| B6H | 1 |
| B5H | 1 |
| B4H | 1 |
| B3H | 1 |
| B2H | 1 |
| B1H | 1 |
| B0H | 1 |
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EA |
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| EADC |
| ET2 |
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| ES |
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| ET1 |
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| EX1 |
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| ET0 |
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| EX0 |
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AFH | 0 |
| AEH | 0 |
| ADH | 0 |
| ACH | 0 |
| ABH | 0 |
| AAH | 0 |
| A9H | 0 |
| A8H | 0 |
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A7H | 1 |
| A6H | 1 |
| A5H | 1 |
| A4H | 1 |
| A3H | 1 |
| A2H | 1 |
| A1H | 1 |
| A0H | 1 |
| BITS |
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SM0 |
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| SM1 |
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| SM2 |
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| REN |
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| TB8 |
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| RB8 |
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| TI |
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| RI |
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| BITS |
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9FH | 0 |
| 9EH | 0 |
| 9DH | 0 |
| 9CH | 0 |
| 9BH | 0 |
| 9AH | 0 |
| 99H | 0 |
| 98H | 0 |
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| T2EX |
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| T2 |
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| BITS |
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97H | 1 |
| 96H | 1 |
| 95H | 1 |
| 94H | 1 |
| 93H | 1 |
| 92H | 1 |
| 91H | 1 |
| 90H | 1 |
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TF1 |
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| TR1 |
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| TF0 |
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| TR0 |
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| IE1 |
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| IT1 |
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| IE0 |
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| IT0 |
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| BITS |
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8FH | 0 |
| 8EH | 0 |
| 8DH | 0 |
| 8CH | 0 |
| 8BH | 0 |
| 8AH | 0 |
| 89H | 0 |
| 88H | 0 |
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87H | 1 |
| 86H | 1 |
| 85H | 1 |
| 84H | 1 |
| 83H | 1 |
| 82H | 1 |
| 81H | 1 |
| 80H | 1 |
| BITS |
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SPICON1 DAC0L | DAC0H | DAC1L | DAC1H DACCON |
RESERVED NOT USED
F8H | 00H | F9H | 00H | FAH | 00H | FBH | 00H | FCH | 00H | FDH | 04H |
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B1 | ADCOFSL3 ADCOFSH3 ADCGAINL3 ADCGAINH3 ADCCON3 | RESERVED | SPIDAT | ||||||||||||
F0H 00H F1H 00H F2H 20H | F3H | 00H | F4H | 00H | F5H | 00H |
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| F7H | 00H | |||||
I2CCON1 | RESERVED | RESERVED | RESERVED | RESERVED | RESERVED | RESERVED | ADCCON1 | ||||||||
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E8H | 00H |
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| EFH | 20H |
ACC1 | RESERVED | RESERVED | RESERVED | RESERVED | RESERVED | RESERVED | RESERVED | ||||||||
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E0H | 00H |
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ADCCON21 ADCDATAL ADCDATAH | RESERVED | RESERVED | RESERVED | RESERVED | PSMCON | ||||||||||
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D8H | 00H | D9H | 00H | DAH | 00H |
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| DFH | DEH |
PSW1 | RESERVED | DMAL | DMAH | DMAP | RESERVED | RESERVED | RESERVED | ||||||||
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D0H | 00H |
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| D2H | 00H | D3H | 00H | D4H | 00H |
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T2CON1 | RESERVED | RCAP2L | RCAP2H | TL2 | TH2 | RESERVED | RESERVED | ||||||||
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C8H | 00H |
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| CAH | 00H | CBH | 00H | CCH | 00H | CDH | 00H |
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WDCON1 | NOT USED | NOT USED | NOT USED | ETIM3 | RESERVED | EDARL | RESERVED | ||||||||
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C0H | 00H |
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| C4H | C9H |
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| C6H | 00H |
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IP1 | ECON | ETIM1 | ETIM2 | EDATA1 | EDATA2 | EDATA3 | EDATA4 | ||||||||
B8H | 00H | B9H | 00H | BAH | 52H | BBH | 04H | BCH | 00H | BDH | 00H | BEH | 00H | BFH | 00H |
P31 | NOT USED | NOT USED | NOT USED | NOT USED | NOT USED | NOT USED | NOT USED | ||||||||
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B0H | FFH |
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IE1 | IE2 | NOT USED | NOT USED | NOT USED | NOT USED | NOT USED | NOT USED | ||||||||
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A8H | 00H | A9H | 00H |
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P21 | NOT USED | NOT USED | NOT USED | NOT USED | NOT USED | NOT USED | NOT USED | ||||||||
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A0H | FFH |
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SCON1 | SBUF | I2CDAT | I2CADD | NOT USED | NOT USED | NOT USED | |
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98H | 00H | 99H 00H | 9AH 00H | 9BH 55H |
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P11, 2 | NOT USED | NOT USED | NOT USED NOT USED | NOT USED | NOT USED | NOT USED | |
90H | FFH |
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TCON1 | TMOD | TL0 | TL1 | TH0 | TH1 | NOT USED | NOT USED | |||||
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88H | 00H | 89H | 00H | 8AH | 00H | 8BH | 00H | 8CH | 00H | 8DH 00H |
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P01 | SP | DPL | DPH | DPP | RESERVED | RESERVED | PCON | |||||
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80H | FFH | 81H | 07H | 82H | 00H | 83H | 00H | 84H | 00H |
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| 87H 00H |
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SFR MAP KEY: | THESE BITS ARE CONTAINED IN THIS BYTE. |
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| TCON |
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| MNEMONIC | |
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MNEMONIC |
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| IE0 | IT0 | |||||
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| DEFAULT VALUE | |||
SFR ADDRESS |
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| 89H 0 | 88H 0 | 88H 00H |
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DEFAULT VALUE |
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| SFR ADDRESS | ||||||
SFR NOTES:
1SFRs WHOSE ADDRESS ENDS IN 0H OR 8H ARE BIT ADDRESSABLE.
2THE PRIMARY FUNCTION OF PORT1 IS AS AN ANALOG INPUT PORT; THEREFORE, TO ENABLE THE DIGITAL SECONDARY FUNCTIONS ON THESE PORT PINS, WRITE A '0' TO THE CORRESPONDING PORT 1 SFR BIT.
3CALIBRATION COEFFICIENTS ARE PRECONFIGURED ON
Figure 4. Special Function Register Locations and Reset Values
REV. B |
