Analog Devices ADuC812 manual Dfh, Dch, Cmp, Psmi, TP2 TP1 TP0, Psf, Psmen

ADuC812

POWER SUPPLY MONITOR

As its name suggests, the Power Supply Monitor, once enabled, monitors both supplies (AVDD and DVDD) on the ADuC812. It will indicate when either power supply drops below one of five user-selectable voltage trip points from 2.63 V to 4.63 V. For correct operation of the Power Supply Monitor function, AVDD must be equal to or greater than 2.7 V. The Power Supply Monitor function is controlled via the PSMCON SFR. If enabled via the IE2 SFR, the Power Supply Monitor will interrupt

PSMCON	Power Supply Monitor
	Control Register
SFR Address	DFH
Power-On Default Value	DCH
Bit Addressable	No

the core using the PSMI bit in the PSMCON SFR. This bit will not be cleared until the failing power supply has returned above the trip point for at least 256 ms. This is to ensure that the power supply has fully settled before the bit is cleared. This monitor function allows the user to save working registers to avoid possible data loss due to the low supply condition, and also ensures that normal code execution will not resume until a safe supply level has been well established. The supply monitor is also protected against spurious glitches triggering the interrupt circuit.

—

CMP

PSMI

TP2

TP1

TP0

PSF

PSMEN

			Table X. PSMCON SFR Bit Designations
Bit	Name	Description
7	—	Not Used.
6	CMP	AVDD and DVDD Comparator Bit.
		This is a read-only bit and directly reflects the state of the AVDD and DVDD comparators.
		Read “1” indicates that both AVDD and DVDD supply are above its selected trip point.
		Read “0” indicates that either AVDD or DVDD supply are below its selected trip point.
5	PSMI	Power Supply Monitor Interrupt Bit.
		This bit will be set high by the MicroConverter if CMP is low, indicating low analog
		or digital supply. The PSMI bit can be used to interrupt the processor. Once CMPD
		and/or CMP return (and remain) high, a 256 ms counter is started. When this counter
		times out, the PSMI interrupt is cleared. PSMI can also be written by the user. How
		ever, if either comparator output is low, it is not possible for the user to clear PSMI.
4	TP2	VDD Trip Point Selection Bits.
3	TP1
2	TP0	These bits select the AVDD and DVDD trip-point voltage as follows:
		TP2	TP1	TP0	Selected DVDD Trip Point (V)
		0	0	0	4.63
		0	0	1	4.37
		0	1	0	3.08
		0	1	1	2.93
		1	0	0	2.63
1	PSF	AVDD/DVDD fault indicator
		Read “1” indicates that the AVDD supply caused the fault condition.
		Read “0” indicates that the DVDD supply caused the fault condition.
0	PSMEN	Power Supply Monitor Enable Bit.
		Set to “1” by the user to enable the Power Supply Monitor Circuit.
		Cleared to “0” by the user to disable the Power Supply Monitor Circuit.

Example

To configure the PSM for a trippoint of 4.37 V, the following code would be used

MOV	PSMCON,#005h	;enable PSM with
		;4.37V threshold
SETB	EA	;enable	interrupts
MOV	IE2,#002h	;enable	PSM
		;interrupt

If the supply voltage falls below this level, the PC would vector to the ISR.

ORG	0043h	;PSM ISR
CHECK:MOV	A,PSMCON	;PSMCON.5 is the
		;PSM interrupt
		;bit..
JB	ACC.5,CHECK	;..it is cleared
		;only when Vdd
		;has remained
		;above the trip
		;point for 256ms
		;or more.
RETI	; return only when "all's well"

REV. B –25–