Block Diagram
| Time Slot 15 | Time Slot 0 | Time Slot 1 | Time Slot 2 | Time Slot 3 |
MXCLK |
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MXSYNC# |
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MXDO | Reserved | RTS3 | DTR3 | RTS1 | RTS2 |
MXDI | DCD2 | CTS3 | DSR3 | DCD3 | CTS1 |
Figure 6-3. MX Signal Timings
Signal Descriptions
Serial Ports Defined:
CTSn - clear to send
DCDn - data carrier detected
DSRn - data set ready
DTRn - data terminal ready
RIn - ring indicator
RTSn - request to send
6 |
ABORT (ABT)/RESET (RST) Switch (S1)
The MCPN750A SBC contains a single push button switch that provides both ABORT and RESET functions. When the switch is depressed for less than 3 seconds, an interrupt is generated to the processor via ISA interrupts IRQ8. If the switch is held for more than 3 seconds, a board hard reset is generated.
http://www.motorola.com/computer/literature |
