ENV Set Environment | Motorola IH5, MCPN750A instruction

ENV - Set Environment

ENV - Set Environment

Use the ENV command to view and/or configure interactively all PPCBug operational parameters that are kept in Non-Volatile RAM (NVRAM).

Refer to the PPCBug Firmware Package User’s Manual (PPCBUGA1/UM) for a description of the use of ENV.

Listed and described below are the parameters that you can configure using ENV. The default values shown were those in effect when this publication went to print.

4

Configuring the PPCBug Parameters

The parameters that can be configured using ENV are:

Bug or System environment [B/S] = B?

BBug is the mode where no system type of support is displayed. However, system-related items are still available. (Default)

SSystem is the standard mode of operation, and is the default mode if NVRAM should fail. System mode is defined in the PPCBug Firmware Package User’s Manual.

Field Service Menu Enable [Y/N] = N?

YDisplay the field service menu.

NDo not display the field service menu. (Default)

Probe System for Supported I/O Controllers [Y/N] = Y?

YAccesses will be made to the appropriate system buses (e.g., VMEbus, local MPU bus) to determine the presence of supported controllers. (Default)

NAccesses will not be made to the VMEbus to determine the presence of supported controllers.

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Motorola IH5, MCPN750A manual ENV Set Environment, Configuring the PPCBug Parameters

Contents

Installation and Use Page Safety Summary Flammability CE Notice European Community Limited and Restricted Rights Legend Contents Startup and Operation Cnfg and ENV Commands Connector Pin Assignments Appendix a Xii List of Figures Xiv List of Tables Xvi Part Number Description About This Manual Summary of Changes Overview of Contents Comments and Suggestions Bold Conventions Used in This Manual Block Diagram IntroductionProduct Description MCPN750A Baseboard Block Diagram Overview of Start-up Procedure Getting StartedStartup Overview Equipment Required Using PPCBug Unpacking Instructions ESD Precautions Hardware Configuration PreparationMCPN750A Baseboard Preparation Flash Bank Selection J7 Stand-Alone Operating Mode J8 LEDs System Considerations TMCPN710 Transition Module Preparation TMCPN710 Connector and Header Locations Serial Ports 1 MCPN750A/TMCPN710 Serial Ports 1 TMCPN710 Serial Ports 3 COM3 and COM4 Asynchronous Serial Ports TM-PIMC-0001 Transition Module Preparation TM-PIMC-0001 Connector and Header Locations J11 COM1 and COM2 Asynchronous Serial Ports MCPN750A/TM-PIMC-0001 Serial Ports 1 TM-PIMC-0001 Serial Ports 3 Installing PMC Modules on the MCPN750A SBC Hardware Installation PMC Module Placement on MCPN750A Hardware Installation Installing the MCPN750A Baseboard Hardware Installation Installing PIMs on the TM-PIMC-0001 Transition Module Installing a TMCPN710 or TM-PIMC-0001 Transition Module 10. Installing a PIM on the TM-PIMC-0001 Transition Module Installing the Transition Module in the Chassis Hardware Installation 11. TMCPN710 or TM-PIMC-0001/MCPN750A Mating Configuration Voltage Current Available to PMCs & Transition Modules MCPN750A Module Power RequirementsPage Startup and Operation Applying Power PPCBug System Startup Processor Default View of the Memory Map Default Processor Memory MapMemory Maps Processor Memory Map PCI Local Bus Memory Map Address Decoding with CompactPCI Memory Map System Clock Generator L2 CachePPC Bus Arbitration PCI Host Bridge Memory Maps Interrupt Handling PCI Arbitration ISA DMA Channels Sources of Reset Asic Classes of Reset and Effectiveness Undervoltage Reset Power-On ResetFront Panel Push Button Reset CompactPCI Reset RST# Software Resets Endian IssuesReset Source Identification Processor/Memory Domain PCI Domain Role of the Raven AsicPage PPCBug Basics PPCBug Overview PPCBug MPU, Hardware, and Firmware Initialization Memory RequirementsPPCBug Implementation Nvram Using PPCBug Debugger Commands Command Description Debugger Commands Forkwr Menu Time Diagnostic Tests Test Set Description Diagnostic Test Groups PPCBug Overview Cnfg and ENV Commands 0XX Cnfg Configure Board Information Block ENV Set Environment Configuring the PPCBug Parameters Wide Scsi 16-bit bus Narrow Scsi 8-bit bus. Default Nvram Bootlist GEV.fw-boot-path Boot Enable Y/N = N? Default = $00 ROM Boot Enable Y/N = N? Network Auto Boot Controller LUN = 00? Default Starting Address is $00000000 Dram Parity Enable On-Detection/Always/Never O/A/N = O? Seconds LO, TA, VE Overview Remote Start Via the PCI Bus Remote Start Via the PCI Bus Register description continues Command/response Register Description Remote Start Via the PCI Bus Opcode 0x02 Initialize Memory Opcode 0x01 Write/Read Virtual Register Opcode 0x04 Checksum Memory Opcode 0x03 Write/Read Memory Opcode 0x05 Memory Size Query Opcode 0x06 Debugger QueryOpcode 0x07 Execute Code Command/Respond Error Codes Command/Response Channel Error Codes MCPN750A target Console Demonstration of the Host Interface MCP750 host Console PPC1-Bugm 8000EFC4cr Return *CRC data Unsigned int Sromcrcelementsp, elementsn Reference Function sromcrc.c Introduction Page Features MCPN750A FeaturesFeature Description General Description 1is a block diagram of the MCPN750A’s overall architecture Block Diagram MCPN750A Block Diagram CompactPCI Bus Interface Ethernet Interface Signalling Voltage PMC ConnectorsPCI Mezzanine Interface Mezzanine Type ISA Bus Devices Configuration and Status RegistersSerial Eeprom Asynchronous Serial Ports ISA Interface PCI Peripheral Bus Controller PBC USB Interface Eide InterfaceISA Interrupt Controller ISA DMA Channels Interval Timers Real-Time Clock/NVRAM/Watchdog Timer Function Replacing Lithium Batteries Use ESD Wrist Strap Programmable Timers Raven General Purpose TimersHot Swap Control Circuitry M48T559 Watchdog Timer Raven Watchdog Timers Serial Port Signal Multiplexing Serial Port Signal Multiplexing Signal Multiplexing Iomx From MCPN750A From TMCPN710 & TM-PIMC-0001 Multiplexing Sequence of the MX Function MX Signal Timings Signal Descriptions Abort ABT/RESET RST Switch S1 MPC750 Processor Front Panel Indicators DS1 DS3Raven PCI-Host Bridge Flash Memory JTAG/COP Bank a Flash Programming Enable ECC Memory Controller Dram MemoryCompact Flash Memory Card TM-PIMC-0001 TMCPN710 Transition Module Functional Description MCPN750A and Transition Module Connectors Connector Pin Assignments MCPN750A Connector Pin Assignments MCPN750A CompactPCI Bus Connectors J1/J2MCPN750A J1 CompactPCI Connector MCPN750A J2 CompactPCI Connector MCPN750A CompactPCI User I/O Connector J3 Signal Descriptions MCPN750A J3 User I/O Connector MCPN750A Connector J4 MCPN750A J5 User I/O Connector MCPN750A CompactPCI User I/O Connector J5 Signal Descriptions MCPN750A PCI Mezzanine Card Connector AD10 AD09 +5V AD08 +3.3V AD12 AD11BE0# AD07 Not Used AD06 AD05 +3.3V AD04 +5V Vio AD03 Not Used AD02 AD01 PMCIO35 PMCIO36 MCPN750A 10BaseT/100BaseTx Connector J18 MCPN750A Debug Connector J19MCPN750A 10BaseT/100BaseTx Connector J18 MCPN750A Debug Connector J19 103 101105 107 121 122 120123 124 125 154 153155 156 MCPN750A RISCWatch Debug Connector J6 MCPN750A Processor RISCWatch Debug Connector J6 TMCPN710 Transition Module TMCPN710 Transition Module CompactPCI Connectors J3/J4/J5 10. TMCPN710 COM1 Connector J6 TMCPN710 Transition Module COM1 Connector J6 11. TMCPN710 COM2 Connector J8 TMCPN710 Transition Module COM2 Connector J8TMCPN710 Transition Module COM3 Header J11 12. TMCPN710 COM3/COM4 Headers TMCPN710 Transition Module COM4 Header J14 13. TMCPN710 10BaseT/100BaseTx Connector J13 TMCPN710 Transition Module 10BaseT/100BaseTx Connector J13 TMCPN710 Transition Module USB Connectors J10, J12 14. TMCPN710 USB 0 Connector J1015. TMCPN710 USB 1 Connector J12 16. TMCPN710 Compact Flash IDE Connectors TMCPN710 Transition Module PMC I/O Connectors J1/J2 17. TMCPN710 PMC 1 and 2 I/O ConnectorPin Signal 17. TMCPN710 PMC 1 and 2 I/O Connector TM-PIMC-0001 Transition Module TM-PIMC-0001 CompactPCI User I/O Connector J3, J4, & J5 18. TM-PIMC-0001 COM1 Connector J9 TM-PIMC-0001 Transition Module COM1 Connector J9 19. TM-PIMC-0001 COM2 Connector J8 TM-PIMC-0001 Transition Module COM2 Connector J8 20. TM-PIMC-0001 COM3 and COM4 Headers 21. TM-PIMC-0001 10BaseT/100BaseTx Connector J7 22. TM-PIMC-0001 CompactFLASH IDE Connector J1 J10 Reserved 12VJ20 DD10 J14/J24 TM-PIMC-0001 Transition Module Page Specifications Table A-1. MCPN750A SpecificationsCharacteristics Specifications Cooling Requirements EMC Compliance Specifications Computer Group Literature Center Web Site Motorola Computer Group Documents Table B-1. Motorola Computer Group DocumentsDocument Title Publication Number Manufacturers’ Documents Table B-2. Manufacturers’ DocumentsDocument Title and Source Publication Number Manufacturers’ Documents Table B-3. Related Specifications Related Specifications Related Specifications Table B-3. Related Specifications Index COM2 IN-3 IN-4 LED PMC Prst Romfal IN-9 IN-10