Motorola MCPN750A, IH5 manual ECC Memory Controller, Dram Memory, Compact Flash Memory Card

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Functional Description

ECC Memory Controller

ECC memory is provided by onboard DRAM devices. The DRAM memory size ranges from 16MB to 256MB. The DRAM memory is controlled by the Falcon chipset which performs two-way interleaving and provides single-bit error correction and double-bit error detection. ECC is calculated over 72-bits. Falcon provides single and double bit error logging by latching the address and syndrome bits associated with the data in error. The error is latched until cleared by software, unless the currently logged error is single-bit and a new double-bit error is encountered. The Falcon devices are connected to the processor data parity signals to provide processor data bus parity generation and checking. The Falcon memory controller also provides access to some of the system configuration registers. Refer to the MCPN750A CompactPCI Single Board Computer Programmer’s Reference Guide (MCPN750A/PG) for additional information and programming details.

DRAM Memory

The ECC DRAM memory consists of one or two banks which can be populated to provide 16MB, 32MB, 64MB, 128MB, or 256MB. Each bank is populated with nine 16-bit wide, 50-pin, TSOP DRAM devices to form a 144-bit wide memory bank. The memory may be populated with 1Mx16 DRAM devices to provide 16MB or 32MB of DRAM. Alternatively, 4Mx16 DRAM devices may be used to provide 64MB or 128MB of memory, or 8Mx16 DRAM devices may be used to provide 256MB.

Refer to the MCPN750A CompactPCI Single Board Computer Programmer’s Reference Guide (MCPN750A/PG) for additional information and programming details.

Compact FLASH Memory Card

The MCPN750A supports two EIDE compatible Compact FLASH Memory Cards off of the PBC Primary EIDE interface. These Compact FLASH memory cards reside on the TMCPN710 Transition Module. Once configured, this memory will appear as a standard ATA (EIDE) disk drive.

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