Motorola MCPN750A, IH5 manual Opcode 0x03 Write/Read Memory, Opcode 0x04 Checksum Memory

5

Remote Start Via the PCI Bus

Opcode 0x03: Write/Read Memory

This command allows the host to Read or Write individual address locations on the local address bus. Data sizes of 8, 16 and 32 bits are supported. The specific operation and size are determined by the command options field. Note: Verbose mode target command processing is not available with this command; command register bit 9 is ignored.

❏The data to be written is specified in the data field. If the options specifies 32 bit writes, then the upper half of VR1 sources the upper 16 bits of the data (i.e. the data field can only provide the lower 16 bits). On reads, the read data is 0 extended to 32 bits and is stored in VR1. The lower 16 bits of VR1 are returned in the result field.

❏The address to be used for the access is taken from VR0. Command option bits affect the operation as follows:

❏Bit 15 indicates read (0) or write (1) operation

❏Bit 14 indicates whether to auto-increment VR0 after the access is performed. If 0, the contents of VR0 is unaffected by this command. If 1, the contents of VR0 is incremented by 1,2 or 4 depending on the size of the access.

The autoincrement feature may be used during downloads of sequential data to avoid the overhead of issuing an additional write virtual register command after each datum is written.

❏Bit 12 & 13 specify the size of the access. 00 indicates an 8 bit, 01 indicates a 16 bit and 10 indicates 32 bits

Opcode 0x04: Checksum Memory

This command calculates the 16 bit checksum (specified at the end of this chapter in the section titled Reference Function: srom_crc.c) and returns the result in the result field. This is useful for determining whether a download image is intact without incurring the overhead of reading each location in the image using the memory read command.

5-6 Computer Group Literature Center Web Site