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Motorola MCPN750A, IH5 manual Specifications Computer Group Literature Center Web Site

Models: IH5 MCPN750A

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Specifications Install Error codes Block Diagram Signalling Voltage Default Processor Memory Map Interval Timers Front Panel Indicators DS1 DS3 Hardware Configuration Endian Issues

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Specifications

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Motorola MCPN750A, IH5 manual Specifications Computer Group Literature Center Web Site

Page 169 Page 171

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Contents

Installation and Use Page Safety Summary Flammability CE Notice European Community Limited and Restricted Rights Legend Contents Startup and Operation Cnfg and ENV Commands Connector Pin Assignments Appendix a Xii List of Figures Xiv List of Tables Xvi About This Manual Part Number Description Overview of Contents Summary of Changes Comments and Suggestions Conventions Used in This Manual Bold Product Description Block DiagramIntroduction MCPN750A Baseboard Block Diagram Startup Overview Overview of Start-up ProcedureGetting Started Using PPCBug Equipment Required ESD Precautions Unpacking Instructions MCPN750A Baseboard Preparation Hardware ConfigurationPreparation Flash Bank Selection J7 Stand-Alone Operating Mode J8 LEDs System Considerations TMCPN710 Transition Module Preparation TMCPN710 Connector and Header Locations Serial Ports 1 MCPN750A/TMCPN710 Serial Ports 1 COM3 and COM4 Asynchronous Serial Ports TMCPN710 Serial Ports 3 TM-PIMC-0001 Transition Module Preparation Connector and Header Locations TM-PIMC-0001 COM1 and COM2 Asynchronous Serial Ports J11 MCPN750A/TM-PIMC-0001 Serial Ports 1 TM-PIMC-0001 Serial Ports 3 Hardware Installation Installing PMC Modules on the MCPN750A SBC PMC Module Placement on MCPN750A Hardware Installation Installing the MCPN750A Baseboard Hardware Installation Installing a TMCPN710 or TM-PIMC-0001 Transition Module Installing PIMs on the TM-PIMC-0001 Transition Module 10. Installing a PIM on the TM-PIMC-0001 Transition Module Installing the Transition Module in the Chassis Hardware Installation 11. TMCPN710 or TM-PIMC-0001/MCPN750A Mating Configuration MCPN750A Module Power Requirements Voltage Current Available to PMCs & Transition ModulesPage Applying Power Startup and Operation PPCBug System Startup Memory Maps Default Processor Memory MapProcessor Default View of the Memory Map Processor Memory Map PCI Local Bus Memory Map CompactPCI Memory Map Address Decoding with PPC Bus Arbitration L2 CacheSystem Clock Generator PCI Host Bridge Memory Maps PCI Arbitration Interrupt Handling Sources of Reset ISA DMA Channels Classes of Reset and Effectiveness Asic Front Panel Push Button Reset Power-On ResetUndervoltage Reset CompactPCI Reset RST# Reset Source Identification Endian IssuesSoftware Resets Processor/Memory Domain Role of the Raven Asic PCI DomainPage PPCBug Overview PPCBug Basics PPCBug PPCBug Implementation MPU, Hardware, and Firmware InitializationMemory Requirements Nvram Using PPCBug Debugger Commands Debugger Commands Command Description Forkwr Menu Diagnostic Tests Time Diagnostic Test Groups Test Set Description PPCBug Cnfg and ENV Commands Overview Cnfg Configure Board Information Block 0XX Configuring the PPCBug Parameters ENV Set Environment Wide Scsi 16-bit bus Narrow Scsi 8-bit bus. Default Nvram Bootlist GEV.fw-boot-path Boot Enable Y/N = N? Default = $00 ROM Boot Enable Y/N = N? Network Auto Boot Controller LUN = 00? Default Starting Address is $00000000 Dram Parity Enable On-Detection/Always/Never O/A/N = O? Seconds LO, TA, VE Remote Start Via the PCI Bus Overview Remote Start Via the PCI Bus Command/response Register Description Register description continues Remote Start Via the PCI Bus Opcode 0x01 Write/Read Virtual Register Opcode 0x02 Initialize Memory Opcode 0x03 Write/Read Memory Opcode 0x04 Checksum Memory Opcode 0x07 Execute Code Opcode 0x05 Memory Size QueryOpcode 0x06 Debugger Query Command/Response Channel Error Codes Command/Respond Error Codes Demonstration of the Host Interface MCPN750A target Console MCP750 host Console PPC1-Bugm 8000EFC4cr Reference Function sromcrc.c Return *CRC data Unsigned int Sromcrcelementsp, elementsn Introduction Page Feature Description FeaturesMCPN750A Features General Description Block Diagram 1is a block diagram of the MCPN750A’s overall architecture MCPN750A Block Diagram CompactPCI Bus Interface Ethernet Interface PCI Mezzanine Interface PMC ConnectorsSignalling Voltage Mezzanine Type Serial Eeprom Configuration and Status RegistersISA Bus Devices Asynchronous Serial Ports PCI Peripheral Bus Controller PBC ISA Interface ISA Interrupt Controller Eide InterfaceUSB Interface ISA DMA Channels Real-Time Clock/NVRAM/Watchdog Timer Function Interval Timers Replacing Lithium Batteries Use ESD Wrist Strap Hot Swap Control Circuitry Programmable TimersRaven General Purpose Timers Raven Watchdog Timers M48T559 Watchdog Timer Serial Port Signal Multiplexing Serial Port Signal Multiplexing Signal Multiplexing Iomx Multiplexing Sequence of the MX Function From MCPN750A From TMCPN710 & TM-PIMC-0001 Abort ABT/RESET RST Switch S1 MX Signal Timings Signal Descriptions Raven PCI-Host Bridge Front Panel Indicators DS1 DS3MPC750 Processor Flash Memory Bank a Flash Programming Enable JTAG/COP Compact Flash Memory Card ECC Memory ControllerDram Memory TMCPN710 Transition Module TM-PIMC-0001 Functional Description Connector Pin Assignments MCPN750A and Transition Module Connectors MCPN750A J1 CompactPCI Connector MCPN750A Connector Pin AssignmentsMCPN750A CompactPCI Bus Connectors J1/J2 MCPN750A J2 CompactPCI Connector MCPN750A CompactPCI User I/O Connector J3 MCPN750A J3 User I/O Connector Signal Descriptions MCPN750A Connector J4 MCPN750A CompactPCI User I/O Connector J5 MCPN750A J5 User I/O Connector Signal Descriptions MCPN750A PCI Mezzanine Card Connector BE0# AD07 Not Used AD06 AD05 +3.3V AD04 AD12 AD11AD10 AD09 +5V AD08 +3.3V +5V Vio AD03 Not Used AD02 AD01 PMCIO35 PMCIO36 MCPN750A 10BaseT/100BaseTx Connector J18 MCPN750A 10BaseT/100BaseTx Connector J18MCPN750A Debug Connector J19 MCPN750A Debug Connector J19 105 101103 107 123 124 120121 122 125 155 153154 156 MCPN750A Processor RISCWatch Debug Connector J6 MCPN750A RISCWatch Debug Connector J6 TMCPN710 Transition Module CompactPCI Connectors J3/J4/J5 TMCPN710 Transition Module TMCPN710 Transition Module COM1 Connector J6 10. TMCPN710 COM1 Connector J6 TMCPN710 Transition Module COM3 Header J11 TMCPN710 Transition Module COM2 Connector J811. TMCPN710 COM2 Connector J8 12. TMCPN710 COM3/COM4 Headers TMCPN710 Transition Module COM4 Header J14 TMCPN710 Transition Module 10BaseT/100BaseTx Connector J13 13. TMCPN710 10BaseT/100BaseTx Connector J13 15. TMCPN710 USB 1 Connector J12 TMCPN710 Transition Module USB Connectors J10, J1214. TMCPN710 USB 0 Connector J10 16. TMCPN710 Compact Flash IDE Connectors Pin Signal TMCPN710 Transition Module PMC I/O Connectors J1/J217. TMCPN710 PMC 1 and 2 I/O Connector 17. TMCPN710 PMC 1 and 2 I/O Connector TM-PIMC-0001 CompactPCI User I/O Connector J3, J4, & J5 TM-PIMC-0001 Transition Module TM-PIMC-0001 Transition Module COM1 Connector J9 18. TM-PIMC-0001 COM1 Connector J9 TM-PIMC-0001 Transition Module COM2 Connector J8 19. TM-PIMC-0001 COM2 Connector J8 20. TM-PIMC-0001 COM3 and COM4 Headers 21. TM-PIMC-0001 10BaseT/100BaseTx Connector J7 22. TM-PIMC-0001 CompactFLASH IDE Connector J1 J10 J20 Reserved12V DD10 J14/J24 TM-PIMC-0001 Transition Module Page Characteristics Specifications SpecificationsTable A-1. MCPN750A Specifications Cooling Requirements EMC Compliance Specifications Computer Group Literature Center Web Site Document Title Publication Number Motorola Computer Group DocumentsTable B-1. Motorola Computer Group Documents Document Title and Source Publication Number Manufacturers’ DocumentsTable B-2. Manufacturers’ Documents Manufacturers’ Documents Related Specifications Table B-3. Related Specifications Related Specifications Table B-3. Related Specifications Index COM2 IN-3 IN-4 LED PMC Prst Romfal IN-9 IN-10

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