Motorola MCPN750A, IH5 manual Classes of Reset and Effectiveness, Asic

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Startup and Operation

3.CompactPCI Push Button Reset (RST#) from the CompactPCI backplane.

4.Watchdog timer Reset function controlled by the SGS-Thomson MK48T559 Watchdog Timer or the Raven Watchdog Timer.

5.Software Hard Reset (PBC Port 92 Register)

6.21554 PCI-to-PCI bridge Secondary Reset Bit

7.21554 PCI-to-PCI bridge Chip Reset Bit.

The following table shows which devices are affected by the various types of resets. For details on using resets, refer to the MCPN750A CompactPCI Single Board Computer Programmer’s Reference Guide (part number MCPN750A/PG).

Table 2-2. Classes of Reset and Effectiveness

Device Affected	Processor	Raven	Falcon	21554	ISA	Other PCI
Reset Source		ASIC	Chip Set	Bridge	Devices	Devices
Power-On/undervoltage	√	√	√	√	√	√
Front Panel Reset switch	√	√	√	√	√	√
CompactPCI PRST#	√	√	√	√	√	√
Watchdog Timer reset	√	√	√	√	√	√
S/W Hard Reset (PBC	√	√	√		√	√
Port 92 Register)
CompactPCI Reset*	√	√	√	#	√	√
(21554 Secondary Bit)
CompactPCI Reset**	√	√	√	√	√	√
(21554 Chip Reset Bit)

#21554 Secondary Reset Bit does not reset the 21554 register state but does reset the 21554 data buffers.

*A configuration write is required to clear the Secondary Reset Bit after it has been written so this bit must not be set by the local MCPN750A processor or else the board will lock up.

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