
DATASHEET
PM5349 S/UNI-QUAD
ISSUE 6 | SATURN USER NETWORK INTERFACE | |
|
|
|
In normal operation, the HCS verification state machine remains in the 'Correction Mode' state. Incoming cells containing no HCS errors are passed to the receive FIFO. Incoming
10.6.4Performance Monitor
The Performance Monitor consists of two
Each counter may be read through the microprocessor interface. Circuitry is provided to latch these counters so that their values can be read while simultaneously resetting the internal counters to 0 or 1, if appropriate, so that a new period of accumulation can begin without loss of any events. It is intended that the counter be polled at least once per second so as not to miss HCS error events.
10.7 Transmit Line Interface (CSPI)
The Transmit Line Interface allows to directly interface the
155.52 Mbit/s data stream.
10.7.1Clock Synthesis
The transmit clock is synthesized from a 19.44 MHz reference. The transfer function yields a typical low pass corner of 2.0 MHz above which reference jitter is attenuated at 12 dB per octave. The design of the loop filter and PLL is optimized for minimum intrinsic jitter. With a jitter free 19.44 MHz reference, the
Proprietary and Confidential to | 46 |