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| PM5349 |
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DATASHEET |
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| ISSUE 6 | SATURN USER NETWORK INTERFACE |
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| 10.10.1 |
| POINTER GENERATOR | 49 |
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| 10.10.2 |
| 50 |
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| 10.10.3 |
| FEBE CALCULATE | 50 |
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| 10.11 | TRANSMIT ATM CELL PROCESSOR (TXCP) | 50 |
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| 10.11.1 |
| IDLE/UNASSIGNED CELL GENERATOR | 50 |
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| 10.11.2 |
| SCRAMBLER | 50 |
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| 10.11.3 |
| HCS GENERATOR | 51 |
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| 10.12 | UTOPIA LEVEL 2 SYSTEM INTERFACE | 51 |
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| 10.12.1 |
| RECEIVE ATM INTERFACE | 51 |
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| 10.12.2 |
| TRANSMIT ATM INTERFACE | 51 |
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| 10.13 | JTAG TEST ACCESS PORT | 52 |
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| 10.14 | MICROPROCESSOR INTERFACE | 52 |
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11 | NORMAL MODE REGISTER DESCRIPTION | 59 |
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12 | TEST FEATURES DESCRIPTION | 193 |
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| 12.1 | MASTER TEST REGISTER | 193 |
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| 12.2 | TEST MODE 0 DETAILS | 195 |
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| 12.3 | JTAG TEST PORT | ............................................................................................ | 196 |
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| 12.3.1 |
| BOUNDARY SCAN CELLS | 198 |
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13 | OPERATION |
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| 201 |
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| 13.1 | SONET/SDH FRAME MAPPINGS AND OVERHEAD BYTE USAGE | 201 |
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| 13.1.1 |
| ATM MAPPING | 201 |
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| 13.1.2 |
| TRANSPORT AND PATH OVERHEAD BYTES | 202 |
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| 13.2 | ATM CELL DATA STRUCTURE | 204 |
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| 13.3 | BIT ERROR RATE MONITOR | 205 |
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| 13.4 | CLOCKING OPTIONS | 206 |
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| 13.5 | LOOPBACK OPERATION | 208 |
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| 13.6 | JTAG SUPPORT |
| 212 |
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| 13.6.1 |
| TAP CONTROLLER | 213 |
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| 13.6.1.1 | STATES | 215 |
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| 13.6.1.2 | INSTRUCTIONS | 216 |
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| 13.7 | BOARD DESIGN RECOMMENDATIONS | 217 |
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| 13.8 | POWER SUPPLY SEQUENCING | 218 |
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Proprietary and Confidential to | III |