Appendices |
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| Apx. C Pin Assignments | |||
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| Pin No. | Signal Name | I/O | Pin No. | Signal Name | I/O |
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| 1 | VREF | - | 2 | VREF | - |
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| 3 | GND | - | 4 | GND | - |
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| 5 | /M_DATA_R_(0) | I/O | 6 | /M_DATA_R_(4) | I/O |
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| 7 | /M_DATA_R_(1) | I/O | 8 | /M_DATA_R_(5) | I/O |
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| 9 | +V2.5 | - | 10 | +V2.5 | - |
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| 11 | /M_DQS_R(0) | I/O | 12 | DGND | - |
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| 13 | /M_DATA_R_(2) | I/O | 14 | /M_DATA_R_(6) | I/O |
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| 15 | DGND | - | 16 | DGND | - |
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| 17 | /M_DATA_R_(3) | I/O | 18 | /M_DATA_R_(7) | I/O |
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| 19 | /M_DATA_R_(8) | I/O | 20 | /M_DATA_R_(12) | I/O |
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| 21 | +V2.5 | - | 22 | +V2.5 | - |
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| 23 | /M_DATA_R_(9) | I/O | 24 | /M_DATA_R_(13) | I/O |
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| 25 | /M_DQS_R(1) | I/O | 26 | DGND | - |
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| 27 | DGND | - | 28 | DGND | - |
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| 29 | /M_DATA_R_(10) | I/O | 30 | /M_DATA_R_(14) | I/O |
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| 31 | /M_DATA_R_(11) | I/O | 32 | /M_DATA_R_(15) | I/O |
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| 33 | +V2.5 | - | 34 | +V2.5 | - |
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| 35 | /M_CLK_DDR5 | I/O | 36 | +V2.5 | - |
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| 37 | /M_CLK_DDR5# | I/O | 38 | DGND | - |
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| 39 | DGND | - | 40 | DGND | - |
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| 41 | /M_DATA_R_(16) | I/O | 42 | /M_DATA_R_(20) | I/O |
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| 43 | /M_DATA_R_(17) | I/O | 44 | /M_DATA_R_(21) | I/O |
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| 45 | +V2.5 | - | 46 | +V2.5 | - |
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| 47 | /M_DQS_R(2) | I/O | 48 | DGND | - |
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| 49 | /M_DATA_R_(18) | I/O | 50 | /M_DATA_R_(22) | I/O |
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| 51 | DGND | - | 52 | DGND | - |
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| 53 | /M_DATA_R_(19) | I/O | 54 | /M_DATA_R_(23) | I/O |
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| 55 | /M_DATA_R_(24) | I/O | 56 | /M_DATA_R_(28) | I/O |
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| 57 | +V2.5 | - | 58 | +V2.5 | - |
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| 59 | /M_DATA_R_(25) | I/O | 60 | /M_DATA_R_(29) | I/O |
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TECRA S1 Maintenance Manual |
