CHAPTER 3 THEORY OF OPERATION

1.3.6Optional serial I/O

HL-1250

The interrupt of the serial I/O is input to the EXINT terminal of the ASIC, and is recognized by the CPU. A 32-byte register is provided for this I/O, which is read from and written to by the CPU.

Fig. 3-16

1.3.7PCI bus HL-1270N

The interface of the PCI bus is PCI specification revision 2.2 compliant.

Fig. 3-17

3-15

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Brother HL-1030, 1240 service manual Optional serial I/O HL-1250, PCI bus HL-1270N