CHAPTER 3 THEORY OF OPERATION

HL-1270N

Fig. 3-6 shows the block diagram of the main PCB of the HL-1270N printer.

A S I C

 

CPU Core

 

Reset Circuit

(MB86832)

 

BUS

INT

Program + Font ROM

 

 

4.0 Mbytes

 

 

Flash ROM

 

 

(2.0 Mbytes)

 

 

RAM

 

 

(4.0 Mbytes)

 

 

Option RAM (SIMM)

 

 

(max. 32Mbytes)

 

 

EEPROM (4096 x 8 bits)

 

 

Oscillator (32.7MHz)

Address Decoder

DRAM Control

Timer

FIFO

 

 

 

 

 

 

 

 

 

 

 

CDCC Parallel I/O

 

 

To PC

 

 

 

 

 

To PC

 

 

 

USB I/O

 

 

 

 

 

 

 

 

 

 

 

Soft Support

EEPROM I/O

Engine Control I/O

To PC or Hub

To Engine PCB

Network Board

Fig. 3-6

PCI Bus Control

3-6

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Image 48
Brother HL-1030, 1240, 1250 service manual CPU Core Reset Circuit