GE EPM 9650/9800 manual Type F34 Limit and Relay Logic States, Type F35 Relay Delays

3.34: Type F34 Limit and Relay Logic States

Length: 1 Register (2 bytes)

This register has two bytes. Each byte has eight bits. The bits in these bytes are associated with the 16 Limits or Relays, the most significant bit of the most significant byte with Limit 1 (or 17, or Relay 1), through to the least significant bit of the least significant byte with Limit 16 (or 32, or Relay 16).

A bit value of 1 means TRUE, while a bit value of 0 means FALSE. TRUE and FALSE result from the AND, OR, XOR, Hysteresis and NOT of two input values of 1 or 0.

Example:

Register 05979, Limit States, Combinations, 1 - 16, might contain the following data:

Address								05979
Value								0461H
Bytes					04H							61H
Bits	0	0	0	0	0	1	0	0	0	1	1	0	0	0	0	1
Limit	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16
Logic (T/F)	F	F	F	F	F	T	F	F	F	T	T	F	F	F	F	T
Interpretation		Limit Combinations, 6, 10, 11 and 16 are currently TRUE; all others are FALSE.

3.35: Type F35 Relay Delays

Length: 1/2 Register (1 byte) (2 per Register)

This register has two bytes. Each byte contains an unsigned integer which is a count-down delay. A relay logic tree must be stable for the duration of the delay before triggering a relay. Delays are preloaded when the Gate G value changes. They are decremented every pass thereafter, until they reach zero.

Example:

Register 06000, Delay Timer, Relay 1 / Relay 2, might contain the following data:

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