APOST Error Codes, Messages and FRU to Failure Information
The following tables define POST error codes and their associated messages. The BIOS will prompt the user to press a key in case of serious errors. The string “Error” precedes some error messages to highlight possible system malfunctions. The BIOS vendor specific error codes are not listed here since not all error codes are applicable to every platform. All POST errors and warnings are logged in the system event log unless it is full.
After the video adapter has been successfully initialized, the BIOS indicates the current testing phase during POST by writing a
Table 15. Port-80h Code Definition
Code | Meaning |
|
|
CP | AMI check point |
|
|
Table 16. Boot Block POST Codes
Checkpoint |
|
|
Code | Description |
|
|
|
|
D0h | The NMI is disabled. | |
| will be verified. |
|
|
| |
D1h | Initializing the DMA controller, performing the keyboard controller Basic Acceptance Test | |
| (BAT) test, starting memory refresh, and entering 4 GB flat mode next. | |
|
| |
D3h | Starting memory sizing next. | |
|
|
|
D4h | Returning to real mode. | Executing any OEM patches and setting the stack next. |
|
| |
D5h | Passing control to the uncompressed code in shadow RAM. The initialization code is | |
| copied to segment 0 and control will be transferred to segment 0. | |
|
| |
D6h | Control is in segment 0. Next verifying the system BIOS checksum. | |
| If the system BIOS checksum is bad, go to checkpoint code E0h. | |
| Otherwise, going to checkpoint code D7h. | |
|
| |
D7h | Passing control to the interface module next. | |
|
| |
D8h | The main system BIOS runtime code will be decompressed next. | |
|
| |
D9h | Passing control to the main system BIOS in shadow RAM next. | |
|
|
|
03h | The NMI is disabled. | Next, checking for a soft reset or a |
|
| |
05h | The BIOS stack has been built. Next, disabling cache memory. | |
|
| |
06h | Uncompressing the POST code next | |
|
|
|
98