IBM B50 manual Ipl Ros Crc

Checkpoint	Description	Repair Action
(hex)
E207	Setup Data gather	Replace system board (see note 3 on page 2-1).
	mode and 64/32-bit
	mode on PCG
E208	Assign bus number	Replace system board (see note 3 on page 2-1).
	on PCG
E209	Assign PCI I/O	Replace system board (see note 3 on page 2-1).
	addresses on PCI
E20A	Assign PCI I/O	Replace system board (see note 3 on page 2-1).
	addresses on PCG
E20B	Check MCERs stuck	Replace system board (see note 3 on page 2-1).
	at fault
E20C	Testing L2 cache	Replace system board (see note 3 on page 2-1).
E210	Processors L1 data	Replace system board (see note 3 on page 2-1).
	cache array test
	fails. System Hangs.
E211	IPL ROS CRC	Replace system board (see note 3 on page 2-1).
	checking
E212	Processor POST	Replace system board (see note 3 on page 2-1).
E213	Initial memory	See “MAP 1240: Memory Problem Resolution” on
	configuration	page 2-9
E214	Memory test	See “MAP 1240: Memory Problem Resolution” on
		page 2-9
E216	Copy ROS into	See “MAP 1240: Memory Problem Resolution” on
	RAM. Set up	page 2-9
	Translation and C
	environment
E21A	System has some	See “Unresolved problems” on page 3-26
	good memory
E220	Final memory	Replace system board (see note 3 on page 2-1).
	configuration	See “MAP 1240: Memory Problem Resolution” on
		page 2-9
E240	Set up Winbond ISA	Replace system board (see note 3 on page 2-1).
	bridge
E241	Reset PCI Bus	Replace system board (see note 3 on page 2-1).
E242	Initialize ISA DMA	Replace system board (see note 3 on page 2-1).
	channel
E243	Set up Grackle	Replace system board (see note 3 on page 2-1).
	configuration
	registers

3-247046 Model B50 Service Guide