NXP Semiconductors LPC2919 user manual Flash bridge wait-states, DLPC2917/19, Draft Draft

NXP Semiconductors

DRAFT	D	D		AFT
	RAFT	RAFT AFT
			DR	DR

DLPC2917/19

ARM9 microcontrollerRAFT withDRAFTCANDRAFTand LINDRAFT

Table 9. Flash sector overview …continued

Sector number	Sector size (kB)
3	8
4	8
5	8
6	8
7	8
8	64
9	64
10	64
11	64
12	64
13	64
14	64

Sector base address

0000 6000h

0000 8000h

0000 A000h

0000 C000h

0000 E000h

0001 0000h

0002 0000h

0003 0000h

0004 0000h

0005 0000h

0006 0000h

0007 0000h

T DRAFT	T
DRA	DRA DR
F	F
DRAFT DRAFT DRAF
DRAFT DRAFT
	DRAFT	D
	DRA

15[1]	64
16[1]	64
17[1]	64
18[1]	64

0008 0000h

0009 0000h

000A 0000h

000B 0000h

[1]Availability of sector 15 to sector 18 depends on device type, see Section 4 “Ordering information”.

The index sector is a special sector in which the JTAG access protection and sector security are located. The address space becomes visible by setting the FS_ISS bit and overlaps the regular flash sector’s address space.

Note that the index sector cannot be erased, and that access to it has to be performed via code outside the flash.

8.1.6Flash bridge wait-states

To eliminate the delay associated with synchronizing flash-read data, a predefined number of wait-states must be programmed. These depend on flash-memory response time and system clock period. The minimum wait-states value can be calculated with the following formulas:

Synchronous reading:

> tacc(clk)

WST ------------------ – 1

tttclk(sys)

Asynchronous reading:

> tacc(addr)

WST --------------------- – 1

ttclk(sys)

LPC2917_19_1 © NXP B.V. 2007. All rights reserved.

Preliminary data sheet Rev. 1.01 — 15 November 2007 17 of 68