NXP Semiconductors LPC2919, LPC2917 Power Management Unit PMU, RGU pin description, RGU pins

NXP Semiconductors

DRAFT	D	D		AFT
	RAFT	RAFT AFT
			DR	DR

DLPC2917/19

ARM9 microcontrollerRAFT withDRAFTCANDRAFTand LINDRAFT

			T	DRAFT			T
			DRA		DRA				DR
			F			F
8.8.5.3 RGU pin description			DRAFT DRAFT DRAF
	The RGU module in the LPC2917/19 has the following pins. Table 26 shows the RGU					DRAFT
	pins.			DRAFT
	Table 26.	RGU pins			DRAFT				D
	Symbol	Directio	Description
		n						DRA
	RSTN	IN	external reset input, Active LOW; pulled up internally

8.8.6Power Management Unit (PMU)

8.8.6.1Overview

This module enables software to actively control the system’s power consumption by disabling clocks not required in a particular operating mode.

Using the base clocks from the CGU as input, the PMU generates branch clocks to the rest of the LPC2917/19. Output clocks branched from the same base clock are phase- and frequency-related. These branch clocks can be individually controlled by software programming.

The key features are:

•Individual clock control for all LPC2917/19 sub-modules

•Activates sleeping clocks when a wake-up event is detected

•Clocks can be individually disabled by software

•Supports AHB master-disable protocol when AUTO mode is set

•Disables wake-up of enabled clocks when power-down mode is set

•Activates wake-up of enabled clocks when a wake-up event is received

•Status register is available to indicate if an input base clock can be safely switched off (i.e. all branch clocks are disabled)

8.8.6.2Description

The PMU controls all internal clocks of the device for power-mode management. With some exceptions, each branch clock can be switched on or off individually under control of software register bits located in its individual configuration register. Some branch clocks controlling vital parts of the device operate in a fixed mode. Table 27 shows which mode- control bits are supported by each branch clock.

By programming the configuration register the user can control which clocks are switched on or off, and which clocks are switched off when entering power-down mode.

Note that the standby-wait-for-interrupt instructions of the ARM968E-S processor (putting the ARM CPU into a low-power state) are not supported. Instead putting the ARM CPU into power-down should be controlled by disabling the branch clock for the CPU.

Remark: For any disabled branch clocks to be re-activated their corresponding base clocks must be running (controlled by the CGU).

Table 27 shows the relation between branch and base clocks, see also Section 7.2.1. Every branch clock is related to one particular base clock: it is not possible to switch the source of a branch clock in the PMU.

LPC2917_19_1 © NXP B.V. 2007. All rights reserved.

Preliminary data sheet Rev. 1.01 — 15 November 2007 48 of 68