NXP Semiconductors LPC2919 8.5.1, Overview, Global acceptance filter, CAN pin description

NXP Semiconductors

DRAFT	D	D		AFT
	RAFT	RAFT AFT
			DR	DR

DLPC2917/19

ARM9 microcontrollerRAFT withDRAFTCANDRAFTand LINDRAFT

		DRA	DRAFT	DRA			DR
		F			F
8.5	CAN gateway	T			T
		DRAFT DRAFT DRAF
8.5.1	Overview
			DRAFT		DRAFT
	Controller Area Network (CAN) is the definition of a high-performance communication						D
	protocol for serial data communication. The two CAN controllers in the LPC2917/19			DRAFT
	provide a full implementation of the CAN protocol according to the CAN specification
						DRA
	version 2.0B. The gateway concept is fully scalable with the number of CAN controllers,

and always operates together with a separate powerful and flexible hardware acceptance filter.

The key features are:

• Supports 11-bit as well as 29-bit identifiers

• Double receive buffer and triple transmit buffer

• Programmable error-warning limit and error counters with read/write access

• Arbitration-lost capture and error-code capture with detailed bit position

• Single-shot transmission (i.e. no re-transmission)

• Listen-only mode (no acknowledge; no active error flags)

• Reception of ‘own’ messages (self-reception request)

• Full CAN mode for message reception

8.5.2 Global acceptance filter

The global acceptance filter provides look-up of received identifiers - called acceptance filtering in CAN terminology - for all the CAN controllers. It includes a CAN ID look-up table memory, in which software maintains one to five sections of identifiers. The CAN ID look-up table memory is 2 kB large (512 words, each of 32 bits). It can contain up to 1024 standard frame identifiers (SFF) or 512 extended frame identifiers (EFF) or a mixture of both types. It is also possible to define identifier groups for standard and extended message formats.

8.5.3 CAN pin description

The two CAN controllers in the LPC2917/19 have the pins listed below. The CAN pins are combined with other functions on the port pins of the LPC2917/19. Table 18 shows the CAN pins (x runs from 0 to 1).

Table 18. CAN pins

Symbol	Direction	Description
CANx TXDC	out	CAN channel x transmit data output
CANx RXDC	in	CAN channel x receive data input

8.6LIN

8.6.1Overview

The LPC2917/19 contain two LIN 2.0 master controllers. These can be used as dedicated LIN 2.0 master controllers with additional support for sync break generation and with hardware implementation of the LIN protocol according to spec 2.0.

The key features are:

LPC2917_19_1 © NXP B.V. 2007. All rights reserved.

Preliminary data sheet Rev. 1.01 — 15 November 2007 30 of 68