NXP Semiconductors
DRAFT | D | D |
| AFT |
RAFT | RAFT AFT | |||
|
|
| DR | DR |
DLPC2917/19
ARM9 microcontrollerRAFT withDRAFTCANDRAFTand LINDRAFT
Table 3. LQFP144 pin assignment …continued
Symbol | Pin | Description |
|
|
|
|
|
| Function 0 (default) |
| Function 1 |
| Function 2 |
|
|
|
| |||
VDD(IO) | 53 | 3.3 V power supply for I/O |
|
| ||
P2.2 | 54 | GPIO 2, pin 2 |
| TIMER2 MAT2 |
| PWM TRAP1 |
P2.3 | 55 | GPIO 2, pin 3 |
| TIMER2 MAT3 |
| PWM TRAP0 |
P1.11 | 56 | GPIO 1, pin 11 |
| SPI1 SCK | - | |
P1.10 | 57 | GPIO 1, pin 10 |
| SPI1 SDI | - | |
P3.12 | 58 | GPIO 3, pin 12 |
| SPI1 SCS0 |
| EXTINT4 |
VSS(CORE) | 59 | ground for digital core |
|
|
|
|
VDD(CORE) | 60 | 1.8 V power supply for digital core |
|
| ||
P3.13 | 61 | GPIO 3, pin 13 |
| SPI1 SDO |
| EXTINT5 |
P2.4 | 62 | GPIO 2, pin 4 |
| TIMER1 MAT0 |
| EXTINT0 |
P2.5 | 63 | GPIO 2, pin 5 |
| TIMER1 MAT1 |
| EXTINT1 |
P1.9 | 64 | GPIO 1, pin 9 |
| SPI1 SDO |
| LIN1 RxD |
VSS(IO) | 65 | ground for I/O |
|
|
|
|
P1.8 | 66 | GPIO 1, pin 8 |
| SPI1 SCS0 |
| LIN1 TxD |
P1.7 | 67 | GPIO 1, pin 7 |
| SPI1 SCS3 |
| UART1 RxD |
P1.6 | 68 | GPIO 1, pin 6 |
| SPI1 SCS2 |
| UART1 TxD |
P2.6 | 69 | GPIO 2, pin 6 |
| TIMER1 MAT2 |
| EXTINT2 |
P1.5 | 70 | GPIO 1, pin 5 |
| SPI1 SCS1 |
| PWM3 MAT5 |
P1.4 | 71 | GPIO 1, pin 4 |
| SPI2 SCS2 |
| PWM3 MAT4 |
TRSTN | 72 | IEEE 1149.1 test reset NOT; active LOW; pulled up internally | ||||
RSTN | 73 | asynchronous device reset; active LOW; pulled up internally | ||||
VSS(OSC) | 74 | ground for oscillator |
|
|
|
|
XOUT_OSC | 75 | crystal out for oscillator |
|
|
|
|
XIN_OSC | 76 | crystal in for oscillator |
|
|
|
|
VDD(OSC) | 77 | 1.8 V supply for oscillator |
|
| ||
VSS(PLL) | 78 | ground for PLL |
|
|
|
|
P2.7 | 79 | GPIO 2, pin 7 |
| TIMER1 MAT3 |
| EXTINT3 |
P3.14 | 80 | GPIO 3, pin 14 |
| SPI1 SDI |
| EXTINT6 |
P3.15 | 81 | GPIO 3, pin 15 |
| SPI1 SCK |
| EXTINT7 |
VDD(IO) | 82 | 3.3 V power supply for I/O |
|
| ||
P2.8 | 83 | GPIO 2, pin 8 | - |
| PWM0 MAT0 | |
P2.9 | 84 | GPIO 2, pin 9 | - |
| PWM0 MAT1 | |
P1.3 | 85 | GPIO 1, pin 3 |
| SPI2 SCS1 |
| PWM3 MAT3 |
P1.2 | 86 | GPIO 1, pin 2 |
| SPI2 SCS3 |
| PWM3 MAT2 |
P1.1 | 87 | GPIO 1, pin 1 |
| EXTINT1 |
| PWM3 MAT1 |
VSS(CORE) | 88 | ground for digital core |
|
|
|
|
VDD(CORE) | 89 | 1.8 V power supply for digital core |
|
| ||
P1.0 | 90 | GPIO 1, pin 0 |
| EXTINT0 |
| PWM3 MAT0 |
P2.10 | 91 | GPIO 2, pin 10 | - |
| PWM0 MAT2 | |
P2.11 | 92 | GPIO 2, pin 11 | - |
| PWM0 MAT3 | |
T DRAFT | T |
| ||
DRA |
| DRA |
| DR |
F |
| F |
|
|
DRAFT DRAFT DRAF | ||||
Function 3 | DRAFT DRAFT | |||
|
|
|
| |
|
| DRAFT | D | |
| EXTBUS D10 |
| |||
|
|
| ||
| EXTBUS D11 |
| DRA | ||
| EXTBUS CS3 |
| |||
|
|
| ||
EXTBUS CS2
-
-
EXTBUS D12
EXTBUS D13
EXTBUS CS1
EXTBUS CS0
EXTBUS A7
EXTBUS A6
EXTBUS D14
EXTBUS A5
EXTBUS A4
EXTBUS D15
CAN0 TxD
CAN0 RxD
SPI0 SCS2
SPI0 SCS1
EXTBUS A3
EXTBUS A2
EXTBUS A1
EXTBUS A0
SPI0 SCS0
SPI0 SCK
LPC2917_19_1 | © NXP B.V. 2007. All rights reserved. |
Preliminary data sheet | Rev. 1.01 — 15 November 2007 | 8 of 68 |
