NXP Semiconductors LPC2919 UARTs, Timer clock description, Overview, Description, DLPC2917/19

NXP Semiconductors

DRAFT	D	D		AFT
	RAFT	RAFT AFT
			DR	DR

DLPC2917/19

ARM9 microcontrollerRAFT withDRAFTCANDRAFTand LINDRAFT

Table 14. Timer pins

Symbol	Direction
TIMERx CAP[0]	IN
TIMERx CAP[1]	IN
TIMERx CAP[2]	IN

Description

TIMER x capture input 0

TIMER x capture input 1

TIMER x capture input 2

T DRAFT	T
DRA	DRA DR
F	F
DRAFT DRAFT DRAF
DRAFT DRAFT
	DRAFT	D

TIMERx CAP[3]	IN
TIMERx MAT[0]	OUT
TIMERx MAT[1]	OUT
TIMERx MAT[2]	OUT
TIMERx MAT[3]	OUT

TIMER x capture input 3	DRA
TIMER x match output 0
TIMER x match output 1
TIMER x match output 2
TIMER x match output 3

8.4.3.4Timer clock description

The timer modules are clocked by two different clocks; CLK_SYS_PESS and CLK_TMRx (x = 0-3), see Section 7.2.2. Note that each timer has its own CLK_TMRx branch clock for power management. The frequency of all these clocks is identical as they are derived from the same base clock BASE_CLK_TMR. The register interface towards the system bus is clocked by CLK_SYS_PESS. The timer and prescale counters are clocked by CLK_TMRx.

8.4.4UARTs

8.4.4.1Overview

The LPC2917/19 contains two identical UARTs located at different peripheral base addresses. The key features are:

•16-byte receive and transmit FIFOs

•Registers conform to industry standard 550

•Receiver FIFO trigger points at 1 byte, 4 bytes, 8 bytes and 14 bytes

•Built-in baud-rate generator

8.4.4.2Description

The UART is commonly used to implement a serial interface such as RS232. The LPC2917/19 contains two industry-standard 550 UARTs with 16-byte transmit and receive FIFOs, but they can also be put into 450 mode without FIFOs.

8.4.4.3UART pin description

The two UARTs in the LPC2917/19 have the following pins. The UART pins are combined with other functions on the port pins of the LPC2917/19. Table 15 shows the UART pins (x runs from 0 to 1).

Table 15. UART pins

Symbol	Direction	Description
UARTx TXD	out	UART channel x transmit data output
UARTx RXD	in	UART channel x receive data input

LPC2917_19_1 © NXP B.V. 2007. All rights reserved.

Preliminary data sheet Rev. 1.01 — 15 November 2007 26 of 68