NXP Semiconductors 8.7.6 PWM, ADC clock description, Overview, Description, DLPC2917/19, Draft

NXP Semiconductors

DRAFT	D	D		AFT
	RAFT	RAFT AFT
			DR	DR

DLPC2917/19

ARM9 microcontrollerRAFT withDRAFTCANDRAFTand LINDRAFT

	T DRAFT	T
DRA		DRA		DR
	F	F
8.7.5.4 ADC clock description	DRAFT DRAFT DRAF
The ADC modules are clocked from two different sources; CLK_MSCSS_ADCx_VPB and
	DRAFT DRAFT
CLK_ADCx (x = 1 or 2), see Section 7.2.2. Note that each ADC has its own CLK ADCx
and CLK_MSCSS_ADCx_VPB branch clocks for power management. If an ADC is		DRAFT		D
unused both its CLK_MSCSS_ADCx_VPB and CLK_ADCx can be switched off.
The frequency of all the CLK_MSCSS_ADCx_VPB clocks is identical to			DRA
CLK_MSCSS_VPB since they are derived from the same base clock

BASE_MSCSS_CLK. Likewise the frequency of all the CLK_ADCx clocks is identical since they are derived from the same base clock BASE_ADC_CLK.

The register interface towards the system bus is clocked by CLK_MSCSS_ADCx_VPB.

Control logic for the analog section of the ADC is clocked by CLK_ADCx, see also

Figure 9.

8.7.6PWM

8.7.6.1Overview

The MSCSS in the LPC2917/19 includes four PWM modules with the following features.

•Six pulse-width modulated output signals

•Double edge features (rising and falling edges programmed individually)

•Optional interrupt generation on match (each edge)

•Different operation modes: continuous or run-once

•16-bit PWM counter and 16-bit prescale counter allow a large range of PWM periods

•A protective mode (TRAP) holding the output in a software-controllable state and with optional interrupt generation on a trap event

•Three capture registers and capture trigger pins with optional interrupt generation on a capture event

•Interrupt generation on match event, capture event, PWM counter overflow or trap event

•A burst mode mixing the external carrier signal with internally generated PWM

•Programmable sync-delay output to trigger other PWM modules (master/slave behavior)

8.7.6.2Description

The ability to provide flexible waveforms allows PWM blocks to be used in multiple applications; e.g. automotive dimmer/lamp control and fan control. Pulse-width modulation is the preferred method for regulating power since no additional heat is generated and it is energy-efficient when compared with linear-regulating voltage control networks.

The PWM delivers the waveforms/pulses of the desired duty cycles and cycle periods. A very basic application of these pulses can be in controlling the amount of power transferred to a load. Since the duty cycle of the pulses can be controlled, the desired amount of power can be transferred for a controlled duration. Two examples of such applications are:

LPC2917_19_1 © NXP B.V. 2007. All rights reserved.

Preliminary data sheet Rev. 1.01 — 15 November 2007 37 of 68