NXP Semiconductors Static characteristics, DLPC2917/19, Raft Aft, Dra Dr, T Draft, Draft Draft

Models: LPC2917 LPC2919

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11. Static characteristics

NXP Semiconductors

DRAFT

D

D

 

AFT

RAFT

RAFT AFT

 

 

 

DR

DR

DLPC2917/19

ARM9 microcontrollerRAFT withDRAFTCANDRAFTand LINDRAFT

11. Static characteristics

T DRAFT

T

DRA

DRA DR

F

F

DRAFT DRAFT DRAF

Table 30. Static characteristics

VDD(CORE) = VDD(OSC_PLL) ; VDD(IO) = 2.7 V to 3.6 V; VDD(A3V3) = 3.0 V to 3.6 V; Tvj = -40 °C to +125 °C; all voltages measured with respect to ground; positive currents flow into the IC; unless otherwise specified.[1]

Symbol

Parameter

Conditions

Min

Typ

Max

Supplies

 

 

 

 

 

DRAFT DRAFT

are

D

DRAFT

 

Unit

 

DRA

Core supply

VDD(CORE)

Core supply voltage.

 

 

1.71

1.80

1.89

V

IDDD(CORE)

Core supply current.

ARM9 and all

 

-

1.1

2.5

mA/

 

 

peripherals active at

 

 

 

 

MHz

 

 

max clock speeds.

 

 

 

 

 

 

 

All clocks off.

[2]

-

30

450

μA

 

 

 

 

 

 

 

 

I/O supply

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD(IO)

I/O digital supply voltage.

 

 

2.7

-

3.6

V

Oscillator supply

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD(OSC_PLL)

Oscillator and PLL supply

 

 

1.71

1.80

1.89

V

 

voltage.

 

 

 

 

 

 

IDDD(OSC_PLL)

Oscillator and PLL supply

start-up

 

1.5

-

3

mA

 

current.

 

 

 

 

 

 

 

Normal mode

 

-

-

1

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

Power-down mode

 

-

-

2

μA

 

 

 

 

 

 

 

Analog-to-digital converter supply

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD(A3V3)

3.3 V ADC supply voltage

 

 

3.0

3.3

3.6

V

IDDA(A3V3)

3.3 V ADC analog supply

Normal mode

 

-

-

1.9

mA

 

current.

 

 

 

 

 

 

 

Power-down mode

 

-

-

4

μA

 

 

 

 

 

 

 

 

 

Input pins and I/O pins configured as input

 

 

 

 

 

 

 

 

 

 

 

 

 

VI

Input voltage.

All port pins and VDD(IO)

[7][8]

-0.5

-

+ 5.5

V

 

 

applied except port 0

 

 

 

 

 

 

 

pins 16 to 31.

 

 

 

 

 

 

 

see Section 9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 0 pins 16 to 31.

[8]

 

 

VVREFP

 

 

 

All port pins and VDD(IO)

 

-0.5

-

+3.6

V

 

 

not applied.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

All other I/O pins,

 

-0.5

-

VDD(IO)

V

 

 

RESET_N, TRST_N,

 

 

 

 

 

 

 

TDI, JTAGSEL, TMS,

 

 

 

 

 

 

 

TCK.

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

HIGH-state input voltage.

All port pins, RESET_N,

 

2.0

-

-

V

 

 

TRST_N, TDI,

 

 

 

 

 

 

 

JTAGSEL, TMS, TCK.

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

LOW-state input voltage.

All port pins, RESET_N,

 

-

-

0.8

V

 

 

TRST_N, TDI,

 

 

 

 

 

 

 

JTAGSEL, TMS, TCK.

 

 

 

 

 

 

 

 

 

 

 

 

 

Vhys

Hysteresis voltage.

 

 

0.4

-

-

V

 

 

 

 

 

 

 

 

ILIH

HIGH-state input leakage

 

 

-

-

1

μA

 

current.

 

 

 

 

 

 

LPC2917_19_1

 

 

 

 

 

© NXP B.V. 2007. All rights reserved.

Preliminary data sheet

Rev. 1.01 — 15 November 2007

53 of 68

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NXP Semiconductors Static characteristics, DLPC2917/19, Raft Aft, Dra Dr, T Draft, NXP Semiconductors, Draft Draft