Mscss timer-clock description | NXP Semiconductors LPC2919, LPC2917

NXP Semiconductors

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DRAFT	RAFT	RAFT AFT		AFT
			DR	DR

DLPC2917/19

ARM9 microcontrollerRAFT withDRAFTCANDRAFTand LINDRAFT

8.7.7.2Description

See section Section 8.4.3.2 for a description of the timers.

8.7.7.3MSCSS timer-pin description MSCSS timer 0 has no external pins.

T DRAFT	T
DRA	DRA DR
F	F
DRAFT DRAFT DRAF
DRAFT DRAFT
	DRAFT	D
	DRAFT

MSCSS timer 1 has a PAUSE pin available as external pin. The PAUSE pin is combined with other functions on the port pins of the LPC2917/19. Table 22 shows the MSCSS timer 1 external pin.

Table 22. MSCSS timer 1 pin

DRA

Symbol	Direction	Description
MSCSS PAUSE	in	pause pin for MSCSS timer 1

8.7.7.4MSCSS timer-clock description

The Timer modules in the MSCSS are clocked by CLK_MSCSS_MTMRx (x = 0-1), see Section 7.2.2. Note that each timer has its own CLK_MSCSS_MTMRx branch clock for power management. The frequency of all these clocks is identical to CLK_MSCSS_VPB since they are derived from the same base clock BASE_MSCSS_CLK.

Note that, unlike the timer modules in the Peripheral SubSystem, the actual timer counter registers run at the same clock as the VPB system interface CLK_MSCSS_VPB. This clock is independent of the AHB system clock.

If a timer module is not used its CLK_MSCSS_MTMRx branch clock can be switched off.

8.8Power, clock and reset control subsystem

8.8.1Overview

The Power, Clock and Reset Control Subsystem (PCRSS) in the LPC2917/19 includes a Clock Generator Unit (CGU), a Reset Generator Unit (RGU) and a Power Management Unit (PMU).

8.8.2Description

Figure 11 provides an overview of the PCRSS. An AHB-to-DTL bridge takes care of communication with the AHB system bus.

LPC2917_19_1

© NXP B.V. 2007. All rights reserved.

Preliminary data sheet

Rev. 1.01 — 15 November 2007

40 of 68

Image 40

NXP Semiconductors LPC2919 Power, clock and reset control subsystem, Mscss timer-clock description, Mscss timer 1 pin

Contents

Introduction General descriptionAbout this document Intended audience ARM968E-S processor NXP SemiconductorsOn-chip flash memory system On-chip static RAM FeaturesGeneral Ordering information Ordering optionsOrdering information Part options Block diagram LPC2917/19 block diagram Pinning information PinningPin description General description Symbol Pin Description Function 0 default LQFP144 pin assignment … TIMER2 MAT2 PWM TRAP1 TIMER2 MAT3 PWM TRAP0TIMER1 MAT0 EXTINT0 TIMER1 MAT1 EXTINT1 Pin Description SymbolLQFP144 pin Reset, debug, test and power description Reset and power-up behaviorReset strategy Reset pin Ieee 1149.1 interface pins Jtag boundary-scan test Power supply pins descriptionClocking strategy Clock architecture LPC2917/19 block diagram, overview of clock areas LPC2917/19 Base clock and branch clock relationship Base clock and branch clock overviewBase clock Branch clock name Parts of the device clocked by This branch clock Block description Flash memory controllerOverview Base clock DRA Description Flash memory controller clock description Flash memory controller pin descriptionFlash layout Flash bridge wait-states Flash sector overview … External static memory controller 32 bit Symbol Description System Address Bit FieldExternal memory-bank address bit description External memory timing diagrams External memory controller pinsExternal static-memory controller pin description External static-memory controller clock description Reading from external memory Writing to external memory Reading/writing external memory Chip and feature identification General subsystemGeneral subsystem clock description System Control Unit SCU Symbol Direction Bit position Description Default Polarity Peripheral subsystemPeripheral subsystem clock description Event-router pin connections Watchdog timer clock description TimerPin description 3.2 Description 3.3 Pin description Timer clock description Timer pinsUart pins UARTs Uart clock description Serial peripheral interfaceFunctional description SPI pins Modes of operationSPI pin description SPI clock description Gpio pins General-purpose I/O6.1 Overview Gpio pin description Can pins Can gatewayLIN Global acceptance filter LIN controller pins Modulation and sampling control subsystemLIN pin description LIN0/1 Txdl Synchronization and trigger features of the Mscss Modulation and sampling control subsystem block diagram Start ADC conditions is valid Mscss pin description Mscss clock description Draft Analog-to-digital converter Analog to digital converter pins ADC block diagramADC pin description 6 PWM ADC clock description PWM block diagram Synchronizing the PWM counters Timers in the Mscss Master and slave modePWM pins PWM pin description Power, clock and reset control subsystem Mscss timer-clock descriptionMscss timer 1 pin Pause pin for Mscss timer PCR subsystem clock description Pcrss block diagramClock Generation Unit CGU CGU base clocks Number Name Frequency Description MHz Block diagram of the CGU Structure of the clock generation scheme PLL functional description CGU pins PLL block diagramCGU pin description Reset Generation Unit RGU Reset output configuration RGU pins Power Management Unit PMURGU pin description DRA Vectored interrupt controller PMU pin description VIC pin description Limiting valuesVIC clock description Thermal characteristics Static characteristics Static characteristicsSymbol Parameter Conditions Min Typ Max Input pins and I/O pins configured as input Analog-to-digital converter supply VDDA5V FSRINL LSB Dynamic characteristics Power-up resetDynamic characteristics Symbol Parameter Conditions Min Typ Max Unit UnitDRAFT Jitter Specification Can TXD pin Cycle-to-cycle jitter Peak-to-peak value Package outline Package outline SOT486-1 LQFP144 Soldering IntroductionThrough-hole mount packages Surface mount packages Volume mm3 350 235 220 Lead-free process from J-STD-020C Temperature profiles for large and small componentsWave soldering SnPb eutectic process from J-STD-020C Package thickness mm Package related soldering information Mounting Package1 Soldering method Wave Reflow2 DippingCPGA, Hcpga DBS, DIP, HDIP, RDBS, SDIP, SIL Mounting Abbreviations list AbbreviationsAbbreviation Description References Revision history Document ID Release date Data sheet statusRevision history Legal information Contact information Contents Soldering Contact information ContentsPackage outline