Symmetricom 1000, 1100 manual SmartClock, BesTime

Chapter 1 Overview of the TimeProvider

SmartClock

These output formats automatically generate SSMs. The quality level of the TimeProvider’s output depends on the quality level of the input signal or the quality level of the local oscillator. During normal operation, when a qualified input is used as the active timing reference, the TimeProvider copies the input’s quality level to all DS1 ESF outputs and E1 CAS4 or CCS4 outputs. T1 SSM messages are mapped to the corresponding equivalent E1 SSM message and vice versa.

If the IOC is operating in Holdover mode for any reason, the SSM quality is the internal level of the oscillator installed in the IOC.

SmartClock

The TimeProvider uses Symmetricom’s SmartClock technology, which predicts frequency changes due to aging of the local oscillator in the IOC; this offsets this deterministic behavior by steering the output with a corrected deviation.

The TimeProvider begins the learning process as soon as you apply a valid external reference source. The SmartClock technology is enabled after 24 hours of continuous lock; the TimeProvider then issues an event message similar to this:

IOC1,EQPT,NA,SCAVAIL,NSA,04-12-14,12:13:14:\”SMARTCLOCK ALGORITHM, ENABLED\”

If you reset the IOC or if the oscillator becomes less stable (for example, due to extreme temperature swings), the TimeProvider disables SmartClock and issues an event message similar to this:

IOC1,EQPT,NA,SCAVAIL,NSA,04-12-17,15:16:17:\”SMARTCLOCK ALGORITHM, DISABLED\”

The TimeProvider automatically restarts SmartClock, which then begins to determine a new aging rate for the oscillator.

BesTime

The TimeProvider uses Symmetricom’s BesTime algorithm when it is in the PRR mode to provide enhanced GR-2830-CORE performance during bridging or holdover situations. BesTime minimizes the effect of transients on the reference signal on the outputs of the TimeProvider by comparing them against the system reference to produce the most stable outputs from the TimeProvider.

The BesTime algorithm is based on Symmetricom’s patented use of multiple-input phase-locked loops (MPLLs) to generate a correction signal for the local oscillator (LO) in the IOC. With GPS as the primary input signal in PRR mode, the signals on the PRS, INP1 and INP2 inputs may be enabled and used in the BesTime ensembling algorithm to generate output signals derived from the optimum weighting of each input.

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