General Hardware Design Considerations—Intel®IXP45X and Intel® IXP46X Product Line of Network Processors

Table 20.

PCI Controller (Sheet 2 of 2)

 

 

 

 

 

 

 

 

 

Input/

Pull

 

 

Name

 

Outpu

Up/

Recommendations

 

 

 

t

Down

 

 

 

 

 

 

 

 

 

 

 

 

Initialization Device Select.

PCI_IDSEL

 

I

Yes

When this interface/signal is enabled and is not being used in a system design, the interface/

 

 

 

 

 

signal should be pulled high with a 10-KΩresistor.

 

 

 

 

 

 

 

 

 

 

 

Arbitration Request.

PCI_REQ_N[3:1]

 

I

Yes

When this interface/signal is enabled and is not being used in a system design, the interface/

 

 

 

 

 

signal should be pulled high with a 10-KΩresistor.

 

 

 

 

 

 

 

 

 

 

 

Arbitration Request:

PCI_REQ_N[0]

 

I/O

Yes

When this interface/signal is enabled and is not being used in a system design, the interface/

 

 

 

 

 

signal should be pulled high with a 10-KΩresistor.

 

 

 

 

 

PCI_GNT_N[3:1]

 

O

No

Arbitration Grant.

 

 

 

 

 

 

 

 

 

 

 

Arbitration Grant.

PCI_GNT_N[0]

 

I/O

Yes

When this interface/signal is enabled and is not being used in a system design, the interface/

 

 

 

 

 

signal should be pulled high with a 10-KΩresistor.

 

 

 

 

 

 

 

 

 

 

 

Interrupt A.

PCI_INTA_N

 

O/D

Yes

When this interface/signal is enabled and is either used or not used in a system design, the

 

 

 

 

 

interface/signal should be pulled high with a 10-KΩresistor.

 

 

 

 

 

 

 

 

 

 

 

Clock input.

PCI_CLKIN

 

I

Yes

When this interface/signal is enabled and is not being used in a system design, the interface/

 

 

 

 

 

signal should be pulled high with a 10-KΩresistor.

 

 

 

 

 

Notes:

 

 

 

 

1.

Features disabled/enabled by Soft Fuse must be done during the boot-up sequence. A feature cannot be enabled after

 

being disabled without asserting a system reset.

2.

Features disabled by a specific part number, do not require pull-ups or pull-downs. Therefore, all pins can be left

 

unconnected.

 

 

3.

Features enabled by a specific part number — and required to be Soft Fuse-disabled, as stated in Note 1 — only require

 

pull-ups or pull-downs in the clock-input signals.

 

 

 

 

 

 

3.12.2PCI Interface Block Diagram

When using the IXP45X/IXP46X network processors in Master mode, the PCI module can interface to up to four PCI cards (devices) at 33 MHz or two PCI cards at 66 MHz. The limitation to two cards (devices) at 66 MHz is due to load requirements to maintain signal integrity at the higher frequency.

The PCI-to-PCI bridge must be used in order to address the PCI requirement not to exceed one load per PCI connector unless it is through a PCI-to-PCI bridge.

The IDSEL signals on the PCI slots can be connected to one of the PCI_AD lines, preferable to the higher order address signals. Reset support can be accomplished by using one of the GPIO pins to generate a reset or through an external decoder of the Expansion bus.

 

Intel® IXP45X and Intel® IXP46X Product Line of Network Processors

February 2007

HDD

Document Number: 305261; Revision: 004

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Image 49
Intel IXP45X, IXP46X manual PCI Interface Block Diagram, PCI Controller Sheet 2