Mitsubishi Electronics manual 186

11 TROUBLESHOOTING

MELSEC-Q

Special Register List (Continued)

																																	Set by	Corresponding	Corresponding
Number	Name	Meaning																	Explanation															ACPU
																																	(When set)		CPU
																																		D9
			When F goes ON due to																		or				, the F numbers which
SD64															OUT F								SET F											D9125
			go progressively ON from SD64 through SD79 are registered.
SD65			F numbers turned OFF by															RST F				are deleted from SD64 to SD79,												D9126
			and are shifted to the data register following the data register where
SD66																																		D9127
			the deleted F numbers had been stored.
			Execution of the							LEDR				instruction shifts the contents of SD64 to
SD67																																		D9128
			SD79 up by one.
SD68			(This can also be done by using the INDICATOR RESET switch on																															D9129
			the of the Q3A/Q4ACPU.)
SD69			After 16 annunciators have been detected, detection of the 17th will																															D9130
			not be stored from SD64 through SD79.
SD70						SET SET SET RST SET SET SET SET SET SET SET																												D9131
							F50 F25 F99 F25 F15 F70 F65 F38 F110F151F210LEDR
	Table of																														...(Number
SD71		Annunciator		SD62		0		50	50			50	50				50			50		50	50	50		50		50	99				S	D9132
	detected																															detected)
		detection		SD63	0			1	2			3	2				3			4		5	6	7		8		9	8		...(Number of		(Instruction
	annunciator
																																annunciators
SD72	numbers	number																														detected)	execution)	New
				SD64	0			50	50			50	50				50			50		50	50	50		50		50	99
SD73				SD65	0			0	25			25	99				99			99		99	99	99		99		99	15					New
				SD66	0			0	0			99	0				15			15		15	15	15		15		15	70
				SD67	0			0	0			0	0				0			70		70	70	70		70		70	65
SD74																																		New
				SD68	0			0	0			0	0				0			0		65	65	65		65		65	38
				SD69	0			0	0			0	0				0			0		0	38	38		38		38	110
				SD70
SD75					0			0	0			0	0				0			0		0	0	110		110		110	151					New
				SD71	0			0	0			0	0				0			0		0	0	0		151		151	210			(Number
				SD72	0			0	0			0	0				0			0		0	0	0		0		210	0
SD76																																detected)		New
				SD73	0			0	0			0	0				0			0		0	0	0		0		0	0
				SD74	0			0	0			0	0				0			0		0	0	0		0		0	0
SD77																																		New
				SD75	0			0	0			0	0				0			0		0	0	0		0		0	0
				SD76	0			0	0			0	0				0			0		0	0	0		0		0	0
SD78				SD77	0			0	0			0	0				0			0		0	0	0		0		0	0					New
				SD78	0			0	0			0	0				0			0		0	0	0		0		0	0
SD79				SD79	0			0	0			0	0				0			0		0	0	0		0		0	0					New
			• Error codes detected by the CHK instruction are stored as BCD																														S
SD80	CHK number	CHK number																															(Instruction	New
			code.
																																	execution)
SD90			Corresponds to SM90										• F numbers which go ON at step transition																					D9108
															watchdog timer set value and watchdog timer
SD91			Corresponds to SM91																															D9109
															over errors.
SD92	Step transition		Corresponds to SM92													B15								B8			B7					B0		D9110
SD93	watchdog		Corresponds to SM93																															D9111
SD94	timer setting	F number for	Corresponds to SM94															F number setting Timer time limit																D9112
	value	timer set value
																		(0 to 255)									setting						U
SD95	(Enabled only	and time over	Corresponds to SM95																															D9113
																											(1 to 255 s:
	when SFC	error																										(1-s units))
SD96			Corresponds to SM96																															D9114
	program
	exists)												• Timer is started by turning SM90 through
SD97			Corresponds to SM97																															New
															SM99 ON during active step, and if the
SD98			Corresponds to SM98												transition conditions for the relevant steps are																			New
															not met within the timer limits, the designated
SD99			Corresponds to SM99																															New
															annunciator (F) will go ON.
		Stores the
	CH1	preset	3	: 300bps,							6			: 600bps,									24	: 2400bps,						48 : 4800bps
	transmission	transmission																																	QCPU
SD105			96	: 9600bps,							192			: 19.2kbps,									384 : 38.4kbps										S	New
	speed setting	speed when																																	Remote
			576 : 57.6kbps,								1152 : 115.2kbps
	(RS-232)	GX Developer
		is used.

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