2MULTIPLE CPU SYSTEM
1)Access to Multiple CPU high speed transmission area
a)Description of Multiple CPU area device
Word device : U |
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| CPU shared memory address (decimal) (10000 to up to 24335) | ||||||||||
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| First I/O number of CPU module | |||||||||
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| CPU No. |
| CPU No.1 |
| CPU No.2 |
| CPU No.3 |
| CPU No.4 | |
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| First I/O number |
| 3E0(H) |
| 3E1(H) |
| 3E2(H) |
| 3E3(H) |
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Bit device : U |
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| Bit specification (0 to F : Hexadecimal) | ||||||||||
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CPU shared memory address (decimal) (10000 to up to 24335)
First I/O number CPU module
CPU No. | CPU No.1 | CPU No.2 | CPU No.3 | CPU No.4 |
First I/O number | 3E0(H) | 3E1(H) | 3E2(H) | 3E3(H) |
(Example)
•Multiple CPU high speed transmission memory address of CPU No. 2: 10002
U3E1\G10002
•Bit 14 of CPU No. 3 Multiple CPU high speed transmission memory address 10200
U3E2\G10200.E
b)Example of access in the program <Motion SFC program>
•Store K12345678 to the Multiple CPU high speed transmission memory 10200,10201 of self CPU (CPU No.2).
U3E1\G10200L = K12345678
•Turn on bit 12 of the Multiple CPU high speed transmission memory 10301 of self CPU (CPU No.3)
SET U3E2\G10301.C
<Servo program>
•Program which executes the positioning for Axis 1 to position set in the Multiple CPU high speed transmission memory 10400, 10401 of CPU No.1 at the speed set in the 10402, 10403 of CPU No.1, and uses bit 1 of CPU No.1 Multiple CPU high speed transmission memory 10404 of CPU No.1 as a cancel signal.
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Axis | 1, | U3E0\G10400 |
Speed |
| U3E0\G10402 |
Cancel |
| U3E0\G10404.1 |
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POINT
This method can be used to access only the Multiple CPU high speed transmission area of CPU shared memory. It cannot be used to access the CPU shared memory (0 to 4095).
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