Advance Information MC68HC908MR16/MC68HC908MR32 — Rev. 4.0
110 Clock Generator Module (CGM) MOTOROLA
Clock Generator Module (CGM)
8.9 Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . . . .130
8.9.1 Acquisition/Lock Time Definitions. . . . . . . . . . . . . . . . . . . .130
8.9.2 Parametric Influences on Reaction Time. . . . . . . . . . . . . .132
8.9.3 Choosing a Filter Capacitor . . . . . . . . . . . . . . . . . . . . . . . .133
8.9.4 Reaction Time Calculation . . . . . . . . . . . . . . . . . . . . . . . . .133
8.2 IntroductionThis section describes the clock generator module (CGM, version A).
The CGM generates the crystal clock signal, CGMXCLK, wh ich operates
at the frequency of the crystal. The CGM also generates the base clock
signal, CGMOUT, from which the system integration module (SIM)
derives the system clocks.
CGMOUT is based on either the crystal clock divided by two or the
phase-locked loop (PLL) clock, CGMVCLK, divided by two. The PLL is
a frequency generator designed for use with crystals or ceramic
resonators. The PLL can generate an 8-MHz bus frequency without
using a 32-MHz external clock.
8.3 FeaturesFeatures of the CGM include:
• PLL with output frequency in integer multiples of the crystal
reference
• Programmable hardware voltage-controlled oscillator (VCO) for
low-jitter operation
• Automatic bandwidth control mode for low-jitter operation
• Automatic frequency lock detector
• Central processor unit (CPU) interrupt on entry or exit from locked
condition