FLASH Memory
FLASH Control Register
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0 Advance Information
MOTOROLA FLASH Memory 59
4.4 FLASH Control Register
The FLASH control register (FLCR) controls FLASH program and erase
operations.
HVEN — High-Voltage Enable Bit
This read/write bit enables the charge pump to driv e high voltages for
program and erase operations in the array. HVEN can only be set if
either PGM = 1 or ERASE = 1 and the proper sequence fo r p ro gr am
or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
MASS — Mass Erase Control Bit
Setting this read/write bit configures the 32-Kbyte FLASH array for
mass erase operation.
1 = MASS erase operation selected
0 = MASS erase operation unselected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation.
ERASE is interlocked with the PGM bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
1 = Erase operation selected
0 = Erase operation unselected
PGM — Program Control Bit
This read/write bit configures the memory for program operation.
PGM is interlocked with the ERASE bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
1 = Program operation selected
0 = Program operation unselected
Address: $FE08
Bit 7654321Bit 0
Read: 0000
HVEN MASS ERASE PGM
Write:
Reset:00000000
= Unimplemented
Figure 4-1. FLASH Control Register (FLCR)