Motorola MC68HC908MR16, MC68HC908MR32 - page 287

Serial Communications Interface Module (SCI)
Functional Description
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0 Advance Information
MOTOROLA Serial Communications Interface Module (SCI) 287
To locate the start bit, data recovery logic does an asynchronous search
for a logic 0 preceded by three logic 1s. When the falling edge of a
possible start bit occurs, the RT clock begins to count to 16.
To verify the start bit and to detect noise, data recovery logic takes
samples at RT3, RT5, and RT7. Table 14-1 summarizes the results of
the start bit verification samples.
If start bit verification is not successful, the RT clock is reset and a new
search for a start bit begins.
To determine the value of a data bit and to detect noise, recovery logic
takes samples at RT8, RT9, and RT10. Table 14-2 summarizes the
results of the data bit samples.
Table 14-1. Start Bit Verification
RT3, RT5, and RT7
Samples Start Bit Verification Noise Flag
000 Yes 0
001 Yes 1
010 Yes 1
011 No 0
100 Yes 1
101 No 0
110 No 0
111 No 0
Table 14-2. Data Bit Recovery
RT8, RT9, and RT10
Samples Data Bit Determination Noise Flag
000 0 0
001 0 1
010 0 1
011 1 1
100 0 1
101 1 1
110 1 1
111 1 0