Input/Output (I/O) Ports
Port B
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0 Advance Information
MOTOROLA Input/Output (I/O) Ports 313
DDRB[7:0] — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE: Avoid glitches on port B pins by writing to the port B data regi ster before
changing data direction register B bits from 0 to 1.
Figure 15-7 shows the port B I/O logic.
Figure 15-7. Port B I/O Circuit
When bit DDRBx is a logic 1, reading address $0001 reads the PTBx
data latch. When bit DDRBx is a logic 0, reading address $0001 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 15-2 summarizes
the operation of the port B pins.
Table 15-2. Port B Pin Functions
DDRB
Bit PTB Bit I/O Pin Mode
Accesses
to DDRB Accesses to PTB
Read/Write Read Write
0X(1)
1. X = don’t care
Input, Hi-Z(2)
2. Hi-Z = high impedance
DDRB[7:0] Pin PTB[7:0](3)
3. Writing affects data register, but does not affect input.
1 X Output DDRB[7:0] PTB[7:0] PTB[7:0]
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
READ PTB ($0001)
PTBx
DDRBx
PTBx
INTERNAL DATA BUS